| Commit message (Collapse) | Author | Age | Files | Lines |
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Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
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The chip supports 170Mhz, so no need to run at 150Mhz.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
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A 170mhz (or 150mhz) peripheral clock is too fast for some peripherals.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
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Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
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Some of the alternate pins defined are routed to FDCAN2 instead of
FDCAN1, this commit uses the correct IRQ register and peripheral
clock enable bit to enable FDCAN on those pins.
Signed-off-by: Amr Elsayed from Dropeffect GmbH <code@dropeffect.com>
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Signed-off-by: Alex Maclean <monkeh@monkeh.net>
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Use the common lookup_clock_line() code to lookup the adc clock lines.
This also enables resets on the adc1/adc2 hardware block.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
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Include for bootloader_request() definition.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
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Move the stm32 DFU reboot logic to a new dfu_reboot.c file. This
simplifies the per-chip code.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
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Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
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Keep SWEN as 1 in FLASH->ACR register such
that the SWD interface doesn't get disabled.
Signed-off-by: Alex Voinea <voinea.dragos.alexandru@gmail.com>
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Signed-off-by: Matt Baker <baker.matt.j@gmail.com>
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