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* stm32: Add comments on PLL frequency requirements to clock setup codeKevin O'Connor2025-06-029-0/+22
| | | | Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* stm32: Run stm32g431 at 170MhzKevin O'Connor2025-05-313-5/+8
| | | | | | The chip supports 170Mhz, so no need to run at 150Mhz. Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* stm32: Fix spi overflow issue on stm32h7Kevin O'Connor2025-05-301-8/+6
| | | | | | | | Completely filling the spi transmit fifo could lead to a situation where the rx fifo overflows. Make sure not to write past the rx fifo size. Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* rp2040: Fix spi overflow issueKevin O'Connor2025-05-301-4/+9
| | | | | | | | | | | Completely filling the spi transmit fifo could lead to a situation where the rx fifo overflows. Make sure not to write past the rx fifo size. Also, be sure to wait for the transmission to fully complete before exiting spi_transfer(). Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* rp2040: spi - enable fifoTimofey Titovets2025-05-301-4/+8
| | | | Signed-off-by: Timofey Titovets <nefelim4ag@gmail.com>
* stm32: Support using CANBUS on PB5/PB6 on stm32h7 chipsKevin O'Connor2025-05-302-2/+6
| | | | Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* stm32: Simplify Kconfig HAVE_STM32_CANBUS checksKevin O'Connor2025-05-301-7/+7
| | | | | | | | | Avoid unnecessary (HAVE_STM32_CANBUS && MACH_STM32xx) checks in Kconfig. The HAVE_STM32_CANBUS is a helper symbol for all the chips that support canbus, there's no need to mix it with a check for a chip that is already known to have canbus. Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* sos_filter: Improve error checking on section_idxKevin O'Connor2025-05-291-5/+13
| | | | | | | | | | Validate host provided index prior to accessing memory using that index. Also, consistently use a uint8_t for max_sections (to account for integer overflow issues). Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* sensor_hx71x: Update Sensors to report to load_cell_probeGareth Farrington2025-05-292-0/+32
| | | | Signed-off-by: Gareth Farrington <gareth@waves.ky>
* load_cell_probe: Create load_cell_probe MCU objectGareth Farrington2025-05-294-1/+314
| | | | | | Implement MCU features that enable using an adc to stop an axis Signed-off-by: Gareth Farrington <gareth@waves.ky>
* sos_filter: Second Order Sections MCU FilterGareth Farrington2025-05-294-0/+175
| | | | | | | | | | This is an implementation of the SOS fliltering algorithm that runs on the MCU. The filter opperates on data in fixed point format to avoid use of the FPU as klipper does not support FPU usage. This host object handles duties of initalizing and resetting the filter so client dont have to declare their own commands for these opperations. Clients can select how many integer bits they want to use for both the filter coefficients and the filters output value. An arbitrary number of filter sections can be configured. Filters can be designed on the fly with the SciPy library or loaded from another source. Signed-off-by: Gareth Farrington <gareth@waves.ky>
* stm32: h7 spi - add a delay on SCK polarity changeTimofey Titovets2025-05-261-2/+9
| | | | Signed-off-by: Timofey Titovets <nefelim4ag@gmail.com>
* spi_software: add a delay on mode changeTimofey Titovets2025-05-261-5/+8
| | | | Signed-off-by: Timofey Titovets <nefelim4ag@gmail.com>
* rp2040: add a delay on SCK polarity changeTimofey Titovets2025-05-261-0/+7
| | | | Signed-off-by: Timofey Titovets <nefelim4ag@gmail.com>
* stm32: Allow stm32g4 chips to select a bootloaderKevin O'Connor2025-05-191-1/+1
| | | | Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* stm32: spi enable fifo if supported (#6936)Timofey Titovets2025-05-191-7/+21
| | | | Signed-off-by: Timofey Titovets <nefelim4ag@gmail.com> Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* stm32: H7 spi enable use of fifoTimofey Titovets2025-05-191-4/+8
| | | | Signed-off-by: Timofey Titovets <nefelim4ag@gmail.com>
* stm32: Avoid read-modify-write register access in stm32h7_spi.cKevin O'Connor2025-05-161-20/+16
| | | | Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* stepper: Minor code tweak - remove unneeded parenthesisKevin O'Connor2025-05-091-1/+1
| | | | Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* stepper: Minor code reorg - remove unneeded HAVE_OPTIMIZED_PATH definitionKevin O'Connor2025-05-091-8/+7
| | | | | | | Make it more clear that stepper_load_next() has three separate code paths - one for each of the optimized stepper_event_X() functions. Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* stepper: Also ensure minimum time after dir change and next stepKevin O'Connor2025-05-091-3/+11
| | | | | | | | | In practice the host will not schedule any steps immediately after a direction change (due to acceleration limits and the host "step+dir+step filter"). However, there is also no harm in enforcing a minimum duration in the mcu. Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* stepper: Ensure minimum time between step pin and dir pin changeKevin O'Connor2025-05-091-0/+4
| | | | | | | | | | | | | | | Commit 8faed8d9 made it possible to utilize stepper_event_full() while utilizing tmc "step on both edges" optimation. That commit would ensure a minimum step pulse duration, but it did not ensure a minimum duration between step pin and dir pin changes. Commits 0d27195f and 554ae78d optimized the gpio handling on stm32h7 chips, which could potentially cause a very small amount of time between step pin and dir pin changes. Enforce a minimum time after a step pin update before updating the dir pin. Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* stepper: Move timer checks from stepper_event_full() to stepper_load_next()Kevin O'Connor2025-05-091-10/+16
| | | | | | | This simplifies the stepper_event_full() and makes it easier to implement more complex checks. Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* stepper: Free stepper_move struct near top of stepper_load_next()Kevin O'Connor2025-05-091-18/+26
| | | | | | | | Move up the freeing of the stepper_move struct and setting of s->position in stepper_load_next(). This simplifies the code and will make it easier to add more logic to this function. Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* stm32: Run stm32h723 at 520MhzKevin O'Connor2025-05-022-2/+4
| | | | | | Increase speed of stm32h723 chips from 400Mhz to 520Mhz. Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* stm32: Support over 400Mhz main clock in stm32h7_adc.cKevin O'Connor2025-05-021-6/+7
| | | | Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* stm32: Use 12Mhz nominal internal clock in stm32f0_i2c.cKevin O'Connor2025-05-021-9/+9
| | | | | | | Increase the internal nominal clock from 8Mhz to 12Mhz - this improves support for higher chip frequencies. Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* neopixel: Round up in nsecs_to_ticks()Kevin O'Connor2025-04-281-1/+1
| | | | | | | The rp2040 operates at a fast internal clock with a relatively slow external timer and dividing down could result in a too small delay. Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* stm32: Enable VOS0 power mode on stm32h723 if frequency above 400MhzKevin O'Connor2025-04-281-11/+15
| | | | Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* stm32: Don't try to set incorrect PWR->CR3 register on stm32h7Kevin O'Connor2025-04-281-5/+3
| | | | | | It's not valid to set BYPASS and LDOEN at the same time. Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* stm32: Set the PLL frequency equal to CONFIG_CLOCK_FREQ on stm32h723Kevin O'Connor2025-04-281-1/+1
| | | | | | | | There is no reason to use a higher internal PLL frequency. This change also makes it possible to enable higher clock frequencies on the stm32h723. Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* stm32: Avoid read-modify-write register updates in stm32h7 clock_setup()Kevin O'Connor2025-04-281-58/+39
| | | | Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* stm32: Use enable_pclock() in stm32h7 clock_setup()Kevin O'Connor2025-04-281-5/+4
| | | | | | | Use the helper functions to enable the peripheral clock instead of directly manipulating the clock enable bits. Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* stm32h7: Always clear AHB1ENR at startup on stm32h7Kevin O'Connor2025-04-281-5/+1
| | | | | | | Entirely clear the AHB1ENR register. There is no need to modify AHB1LPENR. Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* basecmd: Update stats timing check to support 32bit durationKevin O'Connor2025-04-281-1/+8
| | | | | | Use a 32bit duration check instead of the previous 31bit check. Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* stm32: Add support for spi6 on stm32f42x chipsRussell Cloran2025-04-191-0/+7
| | | | Signed-off-by: Russell Cloran <rcloran@gmail.com>
* stm32: Fix pll_base on stm32h7 when using a clock other than 25MhzKevin O'Connor2025-04-191-1/+1
| | | | Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* stm32: Add optimized stm32h7_gpio.cKevin O'Connor2025-04-194-5/+176
| | | | | | | Add optimized gpio functions for stm32h7 - caching the ODR register can notably improve the performance of the gpio_out_toggle() code. Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* neopixel: Add comments on timingKevin O'Connor2025-04-171-4/+7
| | | | Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* Kconfig: Note which chips require software divide operationsKevin O'Connor2025-04-174-0/+8
| | | | | | | Add a new HAVE_SOFTWARE_DIVIDE_REQUIRED that indicates which chips require software divide. Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* neopixel: Make sure nsecs_to_ticks() is always inlinedKevin O'Connor2025-04-171-1/+1
| | | | | | It is a compile-time calculation that needs to be inlined to work. Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* lcd_st7920: Make sure nsecs_to_ticks() is always inlinedKevin O'Connor2025-04-171-6/+6
| | | | | | It is a compile-time calculation that needs to be inlined to work. Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* lcd_hd44780: Make sure nsecs_to_ticks() is always inlinedKevin O'Connor2025-04-171-6/+6
| | | | | | It is a compile-time calculation that needs to be inlined to work. Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* stm32: Change hard_pwm.c MAX_PWM to 257Kevin O'Connor2025-04-172-3/+4
| | | | | | Choose a value for MAX_PWM that avoids an expensive run-time division. Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* stm32: Fix prescaler overflow check in hard_pwm.cKevin O'Connor2025-04-171-3/+3
| | | | Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* i2c_software: pass pulse ticks from hostTimofey Titovets2025-04-171-12/+5
| | | | Signed-off-by: Timofey Titovets <nefelim4ag@gmail.com>
* i2c_software: reduce gpio calls countTimofey Titovets2025-04-171-10/+12
| | | | | | | | | gpio reset calls are heavy. gpio state are persistent between calls. Drop useless calls. Avoid calls if SDA does not changed. Signed-off-by: Timofey Titovets <nefelim4ag@gmail.com>
* i2c_software: allow freq adjustTimofey Titovets2025-04-171-0/+7
| | | | Signed-off-by: Timofey Titovets <nefelim4ag@gmail.com>
* software_spi: set rate limiting ticks from the hostTimofey Titovets2025-04-171-9/+6
| | | | Signed-off-by: Timofey Titovets <nefelim4ag@gmail.com>
* spi_software: respect expected rateTimofey Titovets2025-04-171-5/+32
| | | | | | | | On fast MCU software spi may violate maximally supported by TMC driver rate. Add dynamic limits to overcome that. Signed-off-by: Timofey Titovets <nefelim4ag@gmail.com>
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