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| author | Kevin O'Connor <kevin@koconnor.net> | 2025-04-21 20:55:56 -0400 |
|---|---|---|
| committer | Kevin O'Connor <kevin@koconnor.net> | 2025-04-28 19:36:55 -0400 |
| commit | 9c37a918db03eb456dd0a6c4c072f2b544d8f569 (patch) | |
| tree | 7eb44f76071c10ad74db41744fb5ec19bb8199b3 /src | |
| parent | f2b68fef7324bb788d4b0dea4c2ef426ebac89bd (diff) | |
| download | kutter-9c37a918db03eb456dd0a6c4c072f2b544d8f569.tar.gz kutter-9c37a918db03eb456dd0a6c4c072f2b544d8f569.tar.xz kutter-9c37a918db03eb456dd0a6c4c072f2b544d8f569.zip | |
stm32: Set the PLL frequency equal to CONFIG_CLOCK_FREQ on stm32h723
There is no reason to use a higher internal PLL frequency. This
change also makes it possible to enable higher clock frequencies on
the stm32h723.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
Diffstat (limited to 'src')
| -rw-r--r-- | src/stm32/stm32h7.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/stm32/stm32h7.c b/src/stm32/stm32h7.c index 737f6668..79d4ab99 100644 --- a/src/stm32/stm32h7.c +++ b/src/stm32/stm32h7.c @@ -93,7 +93,7 @@ clock_setup(void) // Setup pll1 frequency uint32_t pll_base = CONFIG_STM32_CLOCK_REF_25M ? 5000000 : 4000000; - uint32_t pll_freq = CONFIG_CLOCK_FREQ * 2; + uint32_t pll_freq = CONFIG_CLOCK_FREQ * (CONFIG_MACH_STM32H723 ? 1 : 2); uint32_t rcc_cr = RCC_CR_HSION; if (!CONFIG_STM32_CLOCK_REF_INTERNAL) { // Configure PLL from external crystal (HSE) |