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path: root/src/stm32/stm32f1.c
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* usb_cdc: Rename usb_request_bootloader() to bootloader_request()Kevin O'Connor2022-07-291-5/+5
| | | | | | | Rename this board API function to a more generic name. This is in preparation for calling the function from the canbus code. Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* armcm_reset: Add a armcm_reset.h header file for try_request_canboot()Kevin O'Connor2022-06-041-0/+1
| | | | Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* stm32: call "try_request_canboot" for bootloader requestsEric Callahan2022-06-031-0/+1
| | | | Signed-off-by: Eric Callahan <arksine.code@gmail.com>
* stm32: Add remap CAN to PD0/PD1 for stm32f103 (#5173)Sergey15602022-01-261-0/+3
| | | Signed-off-by: Sergey Terentiev <sergey@terentiev.me>
* stm32: Unify enable_pclock() codeKevin O'Connor2021-12-301-34/+11
| | | | | | | | | Unify the handling of the enable_pclock() and is_enabled_pclock() code across all stm32 chips. All chips will now perform a peripheral reset on enable_pclock() (this is a change for stm32f0 and stm32h7). The enable_pclock() code will now also disable irqs during the enable. Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* stm32: Reorganize code in stm32f1.cKevin O'Connor2021-12-231-47/+82
| | | | | | Reorganize stm32f1.c into major code blocks. Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* stm32: Add option to disable SWD on GigaDevice STM32F103 clonesKevin O'Connor2021-11-251-2/+7
| | | | | | Tested by @FotoFieber. Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* stm32: Add comments to configuration of OSPEEDR gpio speedKevin O'Connor2021-10-121-5/+6
| | | | Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* stm32: Support spi1 on PB4/PB5/PB3 on stm32f103 and stm32f2Kevin O'Connor2021-05-261-0/+6
| | | | Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* stm32: Allow alternate USART1 and USART2 ports on stm32f1 and stm32f2Kevin O'Connor2021-05-251-1/+7
| | | | Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* stm32: Reorganize stm32f1 pin remap handlingKevin O'Connor2021-05-251-44/+34
| | | | Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* stm32: Fix USART3 on stm32f1 and stm32f2Kevin O'Connor2021-05-251-0/+4
| | | | | | | | | Commit 6a3c357a incorrectly disabled support for USART3 on stm32f1 and stm32f2 - restore that support. Also, add support for USART3 on PD9/PD8 on stm32f103. Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* stm32f1: reset peripherals in enable_pcclock()Arksine2021-04-071-0/+4
| | | | | | Some bootloaders do not disable peripherals in use before jumping to the application. Reset peripherals to assure correct operation. SIgned-off-by: Eric Callahan <arksine.code@gmail.com>
* stm32: Add hardware PWM support for STM32F1Michael Kurz2021-03-261-0/+29
| | | | | | | | | This adds hardware PWM support for STM32F1 processors. This should also work for STM32 F0/F2/F4 processors, but I don't have one of those to test it. Signed-off-by: Michael Kurz <michi.kurz@gmail.com> Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* stm32: Add support for STM32F1 I2C1 alternate pin mapping (#4012)Michael Kurz2021-03-021-4/+10
| | | | | | This adds support for the alternate pin mapping of I2C1 on PB8/9 in STM32F1 devices Signed-off-by: Michael Kurz <michi.kurz@gmail.com>
* stm32f1: Fix for using 16MHz external crystal (#3814)Matt Shepcar2021-01-241-2/+7
| | | Signed-off-by: Matt Shepcar <matt@shepcar.co.uk>
* stm32: Improved CAN support for STM32 (#2976)bondus2020-06-241-2/+29
| | | | | | | | | Reworked the STM32F0 CAN bus implementation. It's more robust and higher performance. Added support for function remapping to different pins. API is emulating an STM32F0. Improved and ported CAN bus to STM32F0, F1 and F4. Signed-off-by: Pontus Borg <glpontus@gmail.com>
* stm32f1: Add support for HID BootloaderArksine2020-05-281-3/+8
| | | | Signed-off-by: Eric Callahan <arksine.code@gmail.com>
* stm32: Slow ADC frequency to 4.5MhzKevin O'Connor2020-04-301-1/+1
| | | | | | | There are reports that SKR mini boards have more stable ADC results when running the ADC at a slower frequency. Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* stm32: Explicitly reset peripheral clocks on stm32f1Kevin O'Connor2020-03-241-0/+5
| | | | | | It appears some bootloaders do not properly reset some peripherals. Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* stm32: Fix broken clock setup on stm32f1Kevin O'Connor2020-02-291-2/+2
| | | | | | | | | Commit bd6c25c9 introduced a typo that caused the clock divisors to not be set correctly on stm32f1. Reported by @brianrjones69. Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* stm32: Allow external crystal speed to be customized in KconfigKevin O'Connor2019-11-251-10/+10
| | | | Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* stm32: Implement armcm_main() in arch specific codeKevin O'Connor2019-10-241-4/+16
| | | | | | | Move armcm_main() to stm32f0.c, stm32f1.c, and stm32f4.c. This gives the arch specific code more control on the early boot setup. Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* stm32: Move VTOR fixup from main() to chip specific codeKevin O'Connor2019-09-181-0/+5
| | | | Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* stm32: Move usb_request_bootloader() to chip specific codeKevin O'Connor2019-09-181-0/+17
| | | | Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* stm32: Add support for configuring open drain output modeKevin O'Connor2019-08-201-1/+6
| | | | Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* stm32: Make sure to enable the gpio clock prior to setting the first valueKevin O'Connor2019-08-201-2/+10
| | | | Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* stm32: Automatically disable SWD if PA13/PA14 is used on stm32f103Kevin O'Connor2019-08-051-0/+4
| | | | Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* stm32: Rename stm32f4/ directory to stm32/Kevin O'Connor2019-08-051-0/+125
Now that the code in stm32f4/ can handle both stm32f1 and stm32f4 chips, rename the directory to just "stm32". Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
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