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author | bondus <liquidpontus@yahoo.se> | 2020-06-25 00:59:38 +0200 |
---|---|---|
committer | GitHub <noreply@github.com> | 2020-06-24 18:59:38 -0400 |
commit | 7a8e9591e324637d80e4bfd18f1b75774c521dda (patch) | |
tree | cec73f407c920e9547d963c815477230178d0255 /src/stm32/stm32f1.c | |
parent | 7cab732ae9baf5cf6da716f06dc82942426a1712 (diff) | |
download | kutter-7a8e9591e324637d80e4bfd18f1b75774c521dda.tar.gz kutter-7a8e9591e324637d80e4bfd18f1b75774c521dda.tar.xz kutter-7a8e9591e324637d80e4bfd18f1b75774c521dda.zip |
stm32: Improved CAN support for STM32 (#2976)
Reworked the STM32F0 CAN bus implementation. It's more robust and higher performance.
Added support for function remapping to different pins. API is emulating an STM32F0.
Improved and ported CAN bus to STM32F0, F1 and F4.
Signed-off-by: Pontus Borg <glpontus@gmail.com>
Diffstat (limited to 'src/stm32/stm32f1.c')
-rw-r--r-- | src/stm32/stm32f1.c | 31 |
1 files changed, 29 insertions, 2 deletions
diff --git a/src/stm32/stm32f1.c b/src/stm32/stm32f1.c index cad28f31..a1c4c7fe 100644 --- a/src/stm32/stm32f1.c +++ b/src/stm32/stm32f1.c @@ -64,6 +64,18 @@ gpio_clock_enable(GPIO_TypeDef *regs) RCC->APB2ENR; } + +static void stm32f1_alternative_remap(uint32_t mapr_mask, uint32_t mapr_value) +{ + // The MAPR register is a mix of write only and r/w bits + // We have to save the written values in a global variable + static uint32_t mapr = 0; + + mapr &= ~mapr_mask; + mapr |= mapr_value; + AFIO->MAPR = mapr; +} + // Set the mode and extended function of a pin void gpio_peripheral(uint32_t gpio, uint32_t mode, int pullup) @@ -105,9 +117,23 @@ gpio_peripheral(uint32_t gpio, uint32_t mode, int pullup) if (gpio == GPIO('A', 13) || gpio == GPIO('A', 14)) // Disable SWD to free PA13, PA14 - AFIO->MAPR = AFIO_MAPR_SWJ_CFG_DISABLE; + stm32f1_alternative_remap(AFIO_MAPR_SWJ_CFG_Msk, + AFIO_MAPR_SWJ_CFG_DISABLE); + + // STM32F1 remaps functions to pins in a very different + // way from other STM32s. + // Code below is emulating a few mappings to work like an STM32F4 + uint32_t func = (mode >> 4) & 0xf; + if(( gpio == GPIO('B', 8) || gpio == GPIO('B', 9)) && + func == 9) { // CAN + stm32f1_alternative_remap(AFIO_MAPR_CAN_REMAP_Msk, + AFIO_MAPR_CAN_REMAP_REMAP2); + } + // Add more as needed } + + // Handle USB reboot requests void usb_request_bootloader(void) @@ -180,7 +206,8 @@ armcm_main(void) // Disable JTAG to free PA15, PB3, PB4 enable_pclock(AFIO_BASE); - AFIO->MAPR = AFIO_MAPR_SWJ_CFG_JTAGDISABLE; + stm32f1_alternative_remap(AFIO_MAPR_SWJ_CFG_Msk, + AFIO_MAPR_SWJ_CFG_JTAGDISABLE); sched_main(); } |