diff options
| author | Kevin O'Connor <kevin@koconnor.net> | 2020-04-21 10:23:14 -0400 |
|---|---|---|
| committer | Kevin O'Connor <kevin@koconnor.net> | 2020-04-30 19:47:23 -0400 |
| commit | b6ebf5cb09a5ef13aeb65ad294d967dba2266749 (patch) | |
| tree | da37acb333efd597b5246774d160b0aa2c89731a /src/stm32/stm32f1.c | |
| parent | 1460e0d6f41753eb4d149819716125ae46af423b (diff) | |
| download | kutter-b6ebf5cb09a5ef13aeb65ad294d967dba2266749.tar.gz kutter-b6ebf5cb09a5ef13aeb65ad294d967dba2266749.tar.xz kutter-b6ebf5cb09a5ef13aeb65ad294d967dba2266749.zip | |
stm32: Slow ADC frequency to 4.5Mhz
There are reports that SKR mini boards have more stable ADC results
when running the ADC at a slower frequency.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
Diffstat (limited to 'src/stm32/stm32f1.c')
| -rw-r--r-- | src/stm32/stm32f1.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/stm32/stm32f1.c b/src/stm32/stm32f1.c index e5c18a83..97a6ade4 100644 --- a/src/stm32/stm32f1.c +++ b/src/stm32/stm32f1.c @@ -140,7 +140,7 @@ clock_setup(void) cfgr = ((0 << RCC_CFGR_PLLSRC_Pos) | ((div2 - 2) << RCC_CFGR_PLLMULL_Pos)); } - cfgr |= RCC_CFGR_PPRE1_DIV2 | RCC_CFGR_PPRE2_DIV2 | RCC_CFGR_ADCPRE_DIV4; + cfgr |= RCC_CFGR_PPRE1_DIV2 | RCC_CFGR_PPRE2_DIV2 | RCC_CFGR_ADCPRE_DIV8; RCC->CFGR = cfgr; RCC->CR |= RCC_CR_PLLON; |