From b6ebf5cb09a5ef13aeb65ad294d967dba2266749 Mon Sep 17 00:00:00 2001 From: Kevin O'Connor Date: Tue, 21 Apr 2020 10:23:14 -0400 Subject: stm32: Slow ADC frequency to 4.5Mhz There are reports that SKR mini boards have more stable ADC results when running the ADC at a slower frequency. Signed-off-by: Kevin O'Connor --- src/stm32/stm32f1.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/stm32/stm32f1.c') diff --git a/src/stm32/stm32f1.c b/src/stm32/stm32f1.c index e5c18a83..97a6ade4 100644 --- a/src/stm32/stm32f1.c +++ b/src/stm32/stm32f1.c @@ -140,7 +140,7 @@ clock_setup(void) cfgr = ((0 << RCC_CFGR_PLLSRC_Pos) | ((div2 - 2) << RCC_CFGR_PLLMULL_Pos)); } - cfgr |= RCC_CFGR_PPRE1_DIV2 | RCC_CFGR_PPRE2_DIV2 | RCC_CFGR_ADCPRE_DIV4; + cfgr |= RCC_CFGR_PPRE1_DIV2 | RCC_CFGR_PPRE2_DIV2 | RCC_CFGR_ADCPRE_DIV8; RCC->CFGR = cfgr; RCC->CR |= RCC_CR_PLLON; -- cgit v1.2.3-70-g09d2