summaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorTomasz Kramkowski <tk@the-tk.com>2017-02-26 11:32:56 +0000
committerTomasz Kramkowski <tk@the-tk.com>2017-02-26 12:12:31 +0000
commit5092828e34c2cd744e1af7463ad343f34e23cfb3 (patch)
treecad5944c8404d3f49ad5d14f2ed220fd2419678f
parent68c89856c1fc310ad0d75ae1df9d000704e87c8a (diff)
downloadmk20dx256-5092828e34c2cd744e1af7463ad343f34e23cfb3.tar.gz
mk20dx256-5092828e34c2cd744e1af7463ad343f34e23cfb3.tar.xz
mk20dx256-5092828e34c2cd744e1af7463ad343f34e23cfb3.zip
reg/pit: Adhere to new style
-rw-r--r--reg/pit.h23
-rw-r--r--reg/regdefs.h4
2 files changed, 18 insertions, 9 deletions
diff --git a/reg/pit.h b/reg/pit.h
index 90587f6..aafe520 100644
--- a/reg/pit.h
+++ b/reg/pit.h
@@ -3,24 +3,29 @@
#include "regdefs.h"
-#define PIT_MCR REG_32(0x40037000) // PIT Module Control Register
-#define MCR_MDIS 1
-#define MCR_FRZ 0
+// PIT Module Control Register
+#define PIT_MCR REG_32(0x40037000)
+#define MCR_MDIS 1 // Module Disable
+#define MCR_FRZ 0 // Freeze
-#define PIT_LDVAL(n) REG_32(0x40037100 + 16 * (n)) // Timer Load Value Register
+// Timer Load Value Register
+#define PIT_LDVAL(n) REG_32(0x40037100 + 16 * (n))
#define LDVAL_TSV 0 // Timer Start Value
-#define LDVAL_TSV_M (uint32_t)BITS(32)
+#define LDVAL_TSV_M REG_32_M(CVAL_TVL, 32)
-#define PIT_CVAL(n) REG_32(0x40037104 + 16 * (n)) // Current Timer Value Register
+// Current Timer Value Register
+#define PIT_CVAL(n) REG_32(0x40037104 + 16 * (n))
#define CVAL_TVL 0 // Current Timer Value
-#define CVAL_TVL_M (uint32_t)BITS(32)
+#define CVAL_TVL_M REG_32_M(CVAL_TVL, 32)
-#define PIT_TCTRL(n) REG_32(0x40037108 + 16 * (n)) // Timer Control Register
+// Timer Control Register
+#define PIT_TCTRL(n) REG_32(0x40037108 + 16 * (n))
#define TCTRL_CHN 2 // Chain Mode
#define TCTRL_TIE 1 // Timer Interrupt Enable
#define TCTRL_TEN 0 // Timer Enable
-#define PIT_TFLG(n) REG_32(0x4003710C + 16 * (n)) // Timer Flag Register
+// Timer Flag Register
+#define PIT_TFLG(n) REG_32(0x4003710C + 16 * (n))
#define TFLG_TIF 0 // Timer Interrupt Flag
#endif /* LIB_REG_PIT_H */
diff --git a/reg/regdefs.h b/reg/regdefs.h
index 6a38c76..fa14689 100644
--- a/reg/regdefs.h
+++ b/reg/regdefs.h
@@ -7,6 +7,10 @@
#define REG_16(a) (*(volatile uint16_t *)(a))
#define REG_32(a) (*(volatile uint32_t *)(a))
+#define REG_8_M(start, len) ((uint8_t)(BITS(len) << (start)))
+#define REG_16_M(start, len) ((uint16_t)(BITS(len) << (start)))
+#define REG_32_M(start, len) ((uint32_t)(BITS(len) << (start)))
+
#define BV(b) (1 << (b))
#define IS_BIT_SET(reg, bit) (!!((reg) & BV(bit)))
#define WAIT_BIT_UNSET(reg, bit) do { } while (IS_BIT_SET(reg, bit))