diff options
Diffstat (limited to 'reg/pit.h')
| -rw-r--r-- | reg/pit.h | 23 |
1 files changed, 14 insertions, 9 deletions
@@ -3,24 +3,29 @@ #include "regdefs.h" -#define PIT_MCR REG_32(0x40037000) // PIT Module Control Register -#define MCR_MDIS 1 -#define MCR_FRZ 0 +// PIT Module Control Register +#define PIT_MCR REG_32(0x40037000) +#define MCR_MDIS 1 // Module Disable +#define MCR_FRZ 0 // Freeze -#define PIT_LDVAL(n) REG_32(0x40037100 + 16 * (n)) // Timer Load Value Register +// Timer Load Value Register +#define PIT_LDVAL(n) REG_32(0x40037100 + 16 * (n)) #define LDVAL_TSV 0 // Timer Start Value -#define LDVAL_TSV_M (uint32_t)BITS(32) +#define LDVAL_TSV_M REG_32_M(CVAL_TVL, 32) -#define PIT_CVAL(n) REG_32(0x40037104 + 16 * (n)) // Current Timer Value Register +// Current Timer Value Register +#define PIT_CVAL(n) REG_32(0x40037104 + 16 * (n)) #define CVAL_TVL 0 // Current Timer Value -#define CVAL_TVL_M (uint32_t)BITS(32) +#define CVAL_TVL_M REG_32_M(CVAL_TVL, 32) -#define PIT_TCTRL(n) REG_32(0x40037108 + 16 * (n)) // Timer Control Register +// Timer Control Register +#define PIT_TCTRL(n) REG_32(0x40037108 + 16 * (n)) #define TCTRL_CHN 2 // Chain Mode #define TCTRL_TIE 1 // Timer Interrupt Enable #define TCTRL_TEN 0 // Timer Enable -#define PIT_TFLG(n) REG_32(0x4003710C + 16 * (n)) // Timer Flag Register +// Timer Flag Register +#define PIT_TFLG(n) REG_32(0x4003710C + 16 * (n)) #define TFLG_TIF 0 // Timer Interrupt Flag #endif /* LIB_REG_PIT_H */ |