fix issues introduced by enum change

Using enums for everything exposed some bugs.

Additionally, some masks can't fit in enums, maybe all masks should be
done using #define, that will have to wait.

4 files changed, 7 insertions, 6 deletions

diff --git a/reg/pit.h b/reg/pit.h
index 04a9759..106e565 100644
--- a/reg/pit.h
+++ b/reg/pit.h
@@ -14,14 +14,14 @@ enum {
 #define PIT_LDVAL(n) REG_32(0x40037100 + 16 * (n))
 enum {
 	LDVAL_TSV = 0, // Timer Start Value
-	LDVAL_TSV_M = REG_32_M(CVAL_TVL, 32),
+#define LDVAL_TSV_M REG_32_M(LDVAL_TSV, 32)
 };
 
 // Current Timer Value Register
 #define PIT_CVAL(n) REG_32(0x40037104 + 16 * (n))
 enum {
 	CVAL_TVL = 0, // Current Timer Value
-	CVAL_TVL_M = REG_32_M(CVAL_TVL, 32),
+#define CVAL_TVL_M = REG_32_M(CVAL_TVL, 32)
 };
 
 // Timer Control Register
diff --git a/reg/sim.h b/reg/sim.h
index 9a10eaf..be9b585 100644
--- a/reg/sim.h
+++ b/reg/sim.h
@@ -87,7 +87,7 @@ enum {
 #define SIM_CLKDIV1 REG_32(0x40048044)
 enum {
 	CLKDIV1_OUTDIV1 = 28, // Clock 1 output divider value
-	CLKDIV1_OUTDIV1_M = REG_32_M(CLKDIV1_OUTDIV1, 4),
+#define CLKDIV1_OUTDIV1_M REG_32_M(CLKDIV1_OUTDIV1, 4)
 	CLKDIV1_OUTDIV2 = 24, // Clock 2 output divider value
 	CLKDIV1_OUTDIV2_M = REG_32_M(CLKDIV1_OUTDIV2, 4),
 	CLKDIV1_OUTDIV4 = 16, // Clock 4 output divider value
diff --git a/reg/uart.h b/reg/uart.h
index 0ec2105..f856b69 100644
--- a/reg/uart.h
+++ b/reg/uart.h
@@ -116,14 +116,14 @@ enum {
 #define UART_MA1(base) REG_8((base) + 0x8)
 enum {
 	MA1_MA = 0, // Match Address
-	MA1_MA_M = REG_8_M(MA1_M, 8),
+	MA1_MA_M = REG_8_M(MA1_MA, 8),
 };
 
 // UART Match Address Registers 2
 #define UART_MA2(base) REG_8((base) + 0x9)
 enum {
 	MA2_MA = 0, // Match Address
-	MA2_MA_M = REG_8_M(MA2_M, 8),
+	MA2_MA_M = REG_8_M(MA2_MA, 8),
 };
 
 // UART Control Register 4
diff --git a/reg/usbotg.h b/reg/usbotg.h
index 0028d1d..101a642 100644
--- a/reg/usbotg.h
+++ b/reg/usbotg.h
@@ -152,6 +152,7 @@ enum {
 	ADDR_LSEN = 7,
 	ADDR_ADDR = 0,
 	ADDR_ADDR_M = REG_8_M(ADDR_ADDR, 7),
+};
 
 // BDT Page Register 1
 #define USB0_BDTPAGE1 REG_8(0x4007209C)
@@ -171,7 +172,7 @@ enum {
 #define USB0_FRMNUMH REG_8(0x400720A4)
 enum {
 	FRMNUMH_FRM = 0,
-	FRMNUMH_FRM_M = REG_8_M(FRMNUMH_FRM_M, 3),
+	FRMNUMH_FRM_M = REG_8_M(FRMNUMH_FRM, 3),
 };
 
 // Token register