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* stm32: Reduce peripheral clock speed on stm32g4 chipsKevin O'Connor2024-09-221-2/+2
| | | | | | A 170mhz (or 150mhz) peripheral clock is too fast for some peripherals. Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* STM32: Check for NACK (#6687)Timofey Titovets2024-09-222-0/+4
| | | Signed-off-by: Timofey Titovets <nefelim4ag@gmail.com>
* stm32: Fix setting USB clock with USB to CANbus mode on stm32g4/stm32l4Kevin O'Connor2024-08-292-2/+2
| | | | Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* stm32: Fix getting wrong ADC value on PA0 of STM32G431 (#6660)Nicholas Huskie2024-08-081-21/+23
| | | | | | | * Fix getting wrong ADC value on PA0 * Fix invalid/unused pin being used as adc channel on STM32H7/G431/L4 Signed-off-by: Nicholas Huskie <huskie@idealfuture.org.cn>
* armcm_link: Fix build on recent arm gcc/newlibc versionsKevin O'Connor2024-06-171-1/+1
| | | | | | | | It seems recent arm gcc versions no longer build correctly using the "--specs=nano.specs --specs=nosys.specs" linker flags. Replace those linker flags with "-nostdlib -lgcc -lc_nano". Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* stm32: STM32F031 updates (#6607)Elias Bakken2024-05-252-2/+4
| | | | | | | Add support for STM32F031x6 which is the 32 KB version of the STM32F031 MCU. Add new I2C bus variant. Signed-off by: Elias Bakken <elias@iagent.no>
* stm32: Add STM32G474 chip to KconfigDropeffect GmbH2024-05-141-0/+7
| | | | Signed-off-by: Amr Elsayed from Dropeffect GmbH <code@dropeffect.com>
* stm32: Add FDCAN2 channel needed for stm32g4 alternate pinsDropeffect GmbH2024-05-142-2/+15
| | | | | | | | Some of the alternate pins defined are routed to FDCAN2 instead of FDCAN1, this commit uses the correct IRQ register and peripheral clock enable bit to enable FDCAN on those pins. Signed-off-by: Amr Elsayed from Dropeffect GmbH <code@dropeffect.com>
* stm32g4: Fix ADC3 common interface registers name to ADC345_COMMONDropeffect GmbH2024-05-141-0/+4
| | | | | | Use ADC345_COMMON instead of ADC3_COMMON for stm32g4 ADC3 channel. Signed-off-by: Amr Elsayed from Dropeffect GmbH <code@dropeffect.com>
* stm32: Add new spi2 on stm32g0 chips (#6569)Donald A. Cupp Jr2024-05-031-15/+27
| | | Signed-off-by: Donald A. Cupp Jr <doncuppjr@yahoo.com>
* config: Artillery Sidewinder X3 (#6534)TheFeralEngineer2024-04-121-1/+1
| | | Signed-off-by: Phil Timpson <theferalengineer@gmail.com>
* stm32: fix support for USARTs on STM32G0B0Robert Cambridge2024-04-031-0/+7
| | | | Signed-off-by: Robert Cambridge <robert@cambridge.me>
* stm32: Add i2c3 bus to STM32H7 (#6541)FOG_Yamato2024-04-021-0/+3
| | | Signed-off-by: Balanuta Simion <simion@fogyamato.dev>
* stm32: Add i2c3_PC0_PC1 for stm32g0 (#6529)BIGTREETECH2024-03-151-0/+3
| | | Signed-off-by: Alan.Ma from BigTreeTech <tech@biqu3d.com>
* stm32: Fix USART3 ALT pinout on STM32G0 (#6523)Attila2024-03-101-1/+1
| | | Signed-off-by: Attila Rakosi <rattila5@hotmail.com>
* stm32: Remove product names from bootloader choices menuKevin O'Connor2024-01-221-7/+7
| | | | Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* stm32: Add 36KiB bootloader offset option (#6449)Jakub2024-01-221-0/+3
| | | | | - This offset is used by Anycubic Kobra 2 Neo bootloader Signed-off-by: Jakub Przystasz <jakub.przystasz@gmail.com>
* stm32g0: Disable internal pull-down resistors on UCPDx CCx pins, because ↵BIGTREETECH2024-01-211-0/+2
| | | | | klipper never uses UCPD (#6462) Signed-off-by: Alan.Ma from BigTreeTech <tech@biqu3d.com>
* stm32: Fix CAN for STM32G4Alex Maclean2023-12-212-3/+6
| | | | Signed-off-by: Alex Maclean <monkeh@monkeh.net>
* stm32: Fix ADC for STM32G4Alex Maclean2023-12-211-2/+3
| | | | | | | | At least STM32G4 requires four ADC clock cycles between hardware clearing ADCCAL and setting ADEN or the write disappears. Make a tenacious write attempt. Signed-off-by: Alex Maclean <monkeh@monkeh.net>
* stm32: Fix STM32G4 USBAlex Maclean2023-12-211-1/+6
| | | | | | STM32G4 USB controller requires 8 or 16-bit access, not 32-bit Signed-off-by: Alex Maclean <monkeh@monkeh.net>
* hard_pwm: Add pin defs for STM32F070 and STM32F072 (#6409)Will Puckett2023-12-052-2/+65
| | | | | Define hard_pwm pins for STM32F070 and STM32F072, and update KConfig accordingly. Signed-off-by: Will Puckett <willpuckett@gmail.com>
* stm32: enable 64KiB bootloader offset for all F4docgalaxyblock2023-11-161-1/+1
| | | | Signed-off-by: Joshua Schlicker <potter-91@web.de>
* stm32: Make sure to limit tx during usbfs startupKevin O'Connor2023-10-051-1/+2
| | | | | | | Wait for two tx packets before startup, and make sure one of those packets is acked before sending a third tx packet. Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* stm32: Fix usbfs spurious USB packet transmit on startupKevin O'Connor2023-10-041-6/+16
| | | | | | | | | | | Commit cd8d57c2 added USB double buffering mode on transmits. However, when enabling double buffering mode, the hardware seems to always send at least two packets. Spurious transmissions could cause the Linux gs_usb driver to get confused, which could lead to the can0 device becoming unavailable on restarts. Fix by waiting for two USB packets to be available before enabling the endpoint. Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* stm32: Only enable one direction on usbfs double buffered end pointsKevin O'Connor2023-10-041-2/+2
| | | | | | | The bulk out endpoint should not be enabled in tx mode, and the bulk in endpoint should not be enabled in rx mode. Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* stm32: Add usbfs double buffer support for bulk tx messagesKevin O'Connor2023-10-031-8/+28
| | | | | | | | Implement the usbfs fast buffer switching mechanism on the "bulk in" endpoint. This can improve the overall USB throughput and bus utilization. Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* stm32: Add usbfs double buffer support for bulk rx messagesKevin O'Connor2023-10-031-14/+49
| | | | | | | | Implement the usbfs fast buffer switching mechanism on the "bulk out" endpoint. This can improve the overall USB throughput and bus utilization. Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* stm32: Update usbfs to support setting both buffers for each endpointKevin O'Connor2023-10-031-35/+37
| | | | | | | | | The usbfs device supports two buffers for each endpoint - typically one for rx and one for tx. Add support for explicit handling of both buffers. This is in preparation for improved "double buffering" support. Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* stm32: Improve usbfs epr register handlingKevin O'Connor2023-10-031-40/+41
| | | | | | | | Replace the set_stat_x_bits() functions with a single calc_epr_bits() function. This new function supports setting bits other than the stat field in the epr register. Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* Kconfig: Support selecting optional features on chips with small flash sizeKevin O'Connor2023-06-081-1/+1
| | | | | | | | | | | | | Add a new HAVE_LIMITED_CODE_SIZE symbol that enables a menu to select optional features. This symbol is enabled on chips with small build sizes. Replace the HAVE_GPIO_BITBANGING with four new symbols: WANT_GPIO_BITBANGING, WANT_DISPLAYS, WANT_SENSORS, WANT_SOFTWARE_SPI, and WANT_SOFTWARE_I2C. This allows users a little more flexibility when selecting features they need. Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* i2c_software: Implementation of software i2c (#6141)BIGTREETECH2023-06-071-1/+1
| | | Signed-off-by: Alan.Ma from BigTreeTech <tech@biqu3d.com>
* stm32: add PB5/PB6 as CAN pins - required for BTT U2C v2.xStefan Dej2023-05-202-2/+6
| | | | Signed-off-by: Stefan Dej <meteyou@gmail.com>
* stm32f7: add support for stm32f7 and remram boardFrederic Morin2023-05-0710-11/+217
| | | | Signed-off-by: Frederic Morin <frederic.morin.8@gmail.com>
* stm32: Fix usbotg irq wakeup notificationKevin O'Connor2023-04-241-4/+4
| | | | | | | | The DAINTMSK prevents irqs but does not prevent the status reporting in the GINTSTS and DAINT fields. Thus, the mask bits should be checked prior to sending a wakeup notification. Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* stm32: Support for USART5 on STM32G0B1 (#6105)Florin Popescu2023-04-193-0/+23
| | | | | | | Support for USART5 on PD2,3 Add exception on RCC bits for USART5&6 Signed-off-by: Florin Popescu <florinsgpopescu@gmail.com>
* stm32: Improve ifdef indent in hard_pwm.cKevin O'Connor2023-04-071-4/+4
| | | | Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* stm32: Prefer "MACH_STM32F1" test over "MACH_STM32F103 || MACH_N32G45x"Kevin O'Connor2023-04-072-2/+2
| | | | Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* stm32: Add support for Nation N32G45x mcus (#6116)Alexey2023-04-075-10/+215
| | | | | N32G452/G455 are mostly compatible with STM32F103 but have M4 core and different ADC. Signed-off-by: Alexey Golyshin <stas2z@gmail.com>
* stm32: Enable I2C on stm32h7 (#6130)BIGTREETECH2023-03-273-1/+13
| | | Signed-off-by: Alan.Ma from BigTreeTech <tech@biqu3d.com>
* stm32h7: Restore the RCC set in the bootloader to the default value (#6092)BIGTREETECH2023-03-061-0/+6
| | | Signed-off-by: Alan.Ma from BigTreeTech <tech@biqu3d.com>
* stm32: Add sdio supportH. Gregor Molter2023-02-207-5/+457
| | | | | | | | Adds sdio support for the stm32f4 to allow for SD card flash updates without power cycling some boards, e.g. BTT Octopus Pro. Signed-off-by: H. Gregor Molter <gregor.molter@secretlab.de> Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* stm32: add PB12/PB13 FDCAN2 support STM32G0B1bigtreetech2023-02-032-3/+8
| | | | | Signed-off-by: Alan.Ma from BigTreeTech tech@biqu3d.com Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* stm32: Fix CAN2 handling in can.cKevin O'Connor2023-01-171-13/+26
| | | | | | | Using the CAN2 interface still requires that CAN1 be enabled, and the filtering hardware is always on the CAN1 hardware block. Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* stm32: Increase sample time in stm32h7_adc.cKevin O'Connor2023-01-171-7/+10
| | | | | | | | The existing sample times are not long enough to reliably sample the internal temperature sensor. Longer sample times should also improve results with temperature sensors that have a higher inductance. Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* stm32: Don't set boost nor linear calibration on stm32h723 adc3Kevin O'Connor2023-01-171-14/+14
| | | | | | Only adc1 and adc2 have these CR register bits on stm32h723. Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* stm32: Reduce read-modify-write of CR in stm32h7_adc.c initKevin O'Connor2023-01-171-21/+12
| | | | | | | | | | Prefer explicitly setting the CR hardware register to defined values during initialization. Also, prefer "#if CONFIG_MACH_STM32H7" over bit definitions to make it clear that the code applies only on stm32h7. Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* stm32: Don't use read-modify-write on ISR register in stm32h7_adc.cKevin O'Connor2023-01-171-3/+2
| | | | | | Bits are cleared in the ISR register by writing 1, not by masking. Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* stm32: ADC timing rework and fixes in stm32h7_adc.cKevin O'Connor2023-01-171-34/+23
| | | | | | | | | | | | The stm32l412 doesn't have a PLLSAI1 clock and therefore the CKMODE should not be set to zero. The stm32h7 chips run the adc at 25mhz, so BOOST should be set to 0b10. Improve timing comments. Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* stm32: Move clock line mapping from stm32h7_adc.c to lookup_clock_line()Kevin O'Connor2023-01-174-17/+14
| | | | | | | Use the common lookup_clock_line() code to lookup the adc clock lines. This also enables resets on the adc1/adc2 hardware block. Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
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