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* stm32: Wait for setup complete to enable ep0 rx in usbotg.cArksine2020-05-031-4/+11
| | | | | | | | Endpoint 0 OUT needs to NAK everything until the core signals that the setup stage is complete. Signed-off-by: Eric Callahan <arksine.code@gmail.com> Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* stm32: Wait for setup complete notification in usbotg.cKevin O'Connor2020-05-031-6/+13
| | | | | | | | A setup packet is only valid after receiving the "setup complete" notification. Signed-off-by: Eric Callahan <arksine.code@gmail.com> Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* stm32: Slow ADC frequency to 4.5MhzKevin O'Connor2020-04-302-4/+4
| | | | | | | There are reports that SKR mini boards have more stable ADC results when running the ADC at a slower frequency. Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* stm32: Add support for 64KiB bootloader on stm32f103Kevin O'Connor2020-03-241-2/+5
| | | | Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* stm32: Explicitly reset peripheral clocks on stm32f1Kevin O'Connor2020-03-241-0/+5
| | | | | | It appears some bootloaders do not properly reset some peripherals. Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* stm32: Add support for a bootloader on stm32f0Kevin O'Connor2020-03-042-2/+26
| | | | Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* stm32: Revert "stm32: performance improvement for spi on stm32f0"Kevin O'Connor2020-03-041-8/+4
| | | | | | | | | | | This reverts commit a2c309a2b02d16ec15fee5702463621239261266. The above commit is causing crashes on the stm32f103xb chip when spi is in use. It's unclear what the cause of the regression is, but the optimization isn't required so revert it until the root cause can be determined. Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* stm32: Fix broken clock setup on stm32f1Kevin O'Connor2020-02-291-2/+2
| | | | | | | | | Commit bd6c25c9 introduced a typo that caused the clock divisors to not be set correctly on stm32f1. Reported by @brianrjones69. Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* stm32: The stm32f1 can only reach 64Mhz when using an internal clockKevin O'Connor2020-02-141-0/+1
| | | | Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* stm32: Fix typo that broke selection of alternate serial port pinKevin O'Connor2020-02-092-2/+2
| | | | | | Fix a typo in commit aea15250. Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* stm32: Reset adc calibration prior to starting calibrationKevin O'Connor2020-01-251-8/+17
| | | | Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* stm32: Increase adc sample timeKevin O'Connor2020-01-251-4/+4
| | | | | | | Increase the sample time register from 3 to 4 (which adds about ~1.5us to each adc sample). Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* stm32: Only declare alternate usart2 on stm32f0Kevin O'Connor2020-01-233-49/+41
| | | | | | | Also, try to improve the structure of the #if/#else/#endif layout in serial.c. Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* stm32: Don't export spi1a/spi2a on stm32f1Kevin O'Connor2020-01-231-4/+6
| | | | Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* stm32: add alternate pinout for USART2Arne Jansen2020-01-233-1/+16
| | | | | | Added to both generic stm32 and stm32f0 Signed-off-by: Arne Jansen <arne@die-jansens.de>
* stm32: add alternate pinouts for spi1/2Arne Jansen2020-01-231-3/+9
| | | | | | | In addition to spi3, spi1 and spi2 also have alternate pins. Add them as spi1a and spi2a, similar to spi3. Signed-off-by: Arne Jansen <arne@die-jansens.de>
* stm32: performance improvement for spi on stm32f0Arne Jansen2020-01-231-4/+8
| | | | | | | | | | The stm32 has a small queue for spi tx/rx. The current code only uses the spi with a single byte buffer, effectively waiting for each byte to complete before starting the next transfer. This patch changes the structure of spi_transfer() to make use of the queue and achieve back-to-back transfer of bytes on spi. Signed-off-by: Arne Jansen <arne@die-jansens.de>
* stm32: fix spi_transfer for stm32f0Arne Jansen2020-01-231-2/+8
| | | | | | | | | | The current code accesses the DR as 32 bit. This enabled data packing mode, effectively adding a 00 byte between each sent byte. The receive side had similar problems. To prevent this, all accesses are 8 bit now, even though this is not necessary on stmf[14]. Signed-off-by: Arne Jansen <arne@die-jansens.de>
* stm32: STM32F0 CAN featureEug Krashtan2020-01-144-0/+290
| | | | | Signed-off-by: Eug Krashtan <eug.krashtan@gmail.com> Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* stm32: HSI selection fix; Pin swap rename; Add CAN selectionEug Krashtan2020-01-142-7/+11
| | | | | Signed-off-by: Eug Krashtan <eug.krashtan@gmail.com> Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* config: Fysetc S6 generic configuration (#2220)Tobias Weiß2019-12-181-3/+3
| | | Signed-off-by: Tobias Weiß <t.weiss@bk.ru>
* stm32: Fix typo in setting of SMPR1 register on stm32f103Kevin O'Connor2019-11-271-1/+2
| | | | | | Only the stm32f4 has a SMP18 field; it's not present on the stm32f103. Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* stm32: Fix typo in adc startup delayKevin O'Connor2019-11-271-1/+6
| | | | | | Fix (harmless) typo and add comments on adc timing. Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* stm32: Enable chipid as usb serial numberKevin O'Connor2019-11-253-1/+35
| | | | | Signed-off-by: Matt Baker <baker.matt.j@gmail.com> Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* stm32: Allow external crystal speed to be customized in KconfigKevin O'Connor2019-11-254-55/+60
| | | | Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* stm32f0: Initial support for i2c on stm32f0Kevin O'Connor2019-11-144-6/+100
| | | | Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* stm32: adc for new stm32f0 common code (#2120)clearchris2019-11-054-3/+144
| | | | | | | Derived from stm32/adc.c and stm32f0/adc.c with additional changes. Tested on Monoprice Mini Delta (malyan) stm32f070xb board. Signed-off-by: Chris Lombardi <clearchris@hotmail.com>
* stm32: Define PGx pins on stm32f103Kevin O'Connor2019-11-021-2/+7
| | | | Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* flash_usb: Pass -t $CONFIG_MCU to flash_usb on all targetsKevin O'Connor2019-10-261-5/+1
| | | | Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* stm32: Add support for flashing over usb on stm32f042Kevin O'Connor2019-10-262-0/+16
| | | | Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* stm32: stm32f4 usb boot check only needed when CONFIG_USBSERIALKevin O'Connor2019-10-261-2/+2
| | | | Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* stm32f4: Add support for flashing over USBKevin O'Connor2019-10-262-1/+15
| | | | Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* stm32: Implement armcm_main() in arch specific codeKevin O'Connor2019-10-246-30/+40
| | | | | | | Move armcm_main() to stm32f0.c, stm32f1.c, and stm32f4.c. This gives the arch specific code more control on the early boot setup. Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* armcm_boot: Use armcm_main() instead of main() to start board codeKevin O'Connor2019-10-241-5/+5
| | | | | | | | | | The main() function has a special meaning to gcc and using it can result in different code generation. Use armcm_main() to avoid that. Also, invoke SystemInit() from the board specific armcm_main() code. This gives the board code more control over board initialization. Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* stm32: Support PA11/PA12 pin remap on stm32f042 tsop20 chipKevin O'Connor2019-10-232-0/+12
| | | | Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* stm32: Support stm32f042 build from stm32/ directoryKevin O'Connor2019-10-233-2/+39
| | | | Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* stm32: Initial support for stm32f070Kevin O'Connor2019-10-239-21/+390
| | | | Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* stm32: Support 16bit packet memory access on usbfs controllerKevin O'Connor2019-10-231-9/+15
| | | | | | | The stm32f0 line uses 16bit packet memory reads/writes (as opposed to the goofy 32bit accesses required on the stm32f103). Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* stm32: Be explicit in layout of gpio banks in digital_regs variableKevin O'Connor2019-10-231-3/+7
| | | | Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* stm32: Use stm32f103xe header for stm32f103 lineKevin O'Connor2019-10-231-1/+1
| | | | | | Use the "e" revision so that the SPI3 device is available for use. Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* stm32: Make sure to turn on the usb clock before writing to the packet memoryKevin O'Connor2019-10-131-4/+4
| | | | | | | The USB clock needs to be enabled prior to writing to the USB packet memory. Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* stm32: Only prompt for a bootloader on stm32f103 and stm32f407Kevin O'Connor2019-09-181-2/+2
| | | | Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* armcm_boot: Export MCU definition from armcm_bootKevin O'Connor2019-09-181-4/+0
| | | | Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* armcm_reset: Add a new helper file defining command_reset()Kevin O'Connor2019-09-182-9/+3
| | | | | | Add a generic ARM Cortex-M implementation of the "reset" command. Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* stm32: Move VTOR fixup from main() to chip specific codeKevin O'Connor2019-09-183-3/+10
| | | | Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* stm32: Move usb_request_bootloader() to chip specific codeKevin O'Connor2019-09-184-20/+24
| | | | Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* stm32: Fix usbfs rx buffer sizingKevin O'Connor2019-09-161-2/+2
| | | | | | | | | The usbfs receive buffers must also have space for the 2 byte crc at the end of a transmission. This fixes an error that could lead to lost messages from mcu to host (resulting in bytes_invalid increasing in stats) on the stm32f103. Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* stm32: Use official defines for EPR bitsKevin O'Connor2019-09-161-30/+23
| | | | | | Use the standard definitions for the endpoint register bits. Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* stm32: Rename USB_BTABLE to EPM in usbfs.cKevin O'Connor2019-09-161-20/+20
| | | | | | | Rename the internal definition so it isn't in conflict with the USB_BTABLE register. Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* stm32: Disable usb irqs in usbotg handlersKevin O'Connor2019-09-121-17/+56
| | | | | | | | It appears the usbotg controller can get confused if the usb irq handler runs while processing a usb request. Disable usb irqs during usb processing to avoid this. Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
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