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authorKevin O'Connor <kevin@koconnor.net>2022-03-09 13:12:47 -0500
committerKevin O'Connor <kevin@koconnor.net>2022-03-09 13:28:00 -0500
commit4ce2d379bb538085c960eedd5fd1dd393f497bb7 (patch)
tree920140e96071a2ed59548d48d5d9a30526632267 /src
parentd75154d695efb1338cbfff061d226c4f384d127b (diff)
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stm32: Simplify CCIPR2 register assignment on stm32g0
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
Diffstat (limited to 'src')
-rw-r--r--src/stm32/stm32g0.c7
1 files changed, 2 insertions, 5 deletions
diff --git a/src/stm32/stm32g0.c b/src/stm32/stm32g0.c
index ee0230f4..d3815328 100644
--- a/src/stm32/stm32g0.c
+++ b/src/stm32/stm32g0.c
@@ -94,11 +94,8 @@ clock_setup(void)
while ((RCC->CFGR & RCC_CFGR_SWS_Msk) != (2 << RCC_CFGR_SWS_Pos))
;
- // Enable USB clock
- if (CONFIG_USBSERIAL) {
- // PLLQCLK
- RCC->CCIPR2 |= RCC_CCIPR2_USBSEL_1;
- }
+ // Use PLLQCLK for USB (setting USBSEL=2 works in practice)
+ RCC->CCIPR2 = RCC_CCIPR2_USBSEL_1;
}