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authorKevin O'Connor <kevin@koconnor.net>2021-12-18 19:11:17 -0500
committerKevin O'Connor <kevin@koconnor.net>2021-12-23 22:15:25 -0500
commit6e8f28117b25a19c865b9ac8660c22339b2e2b76 (patch)
treee37fea89de43d846f9e726e71ca64f1aed54b096 /src/stm32/stm32f0_serial.c
parent4576b3918c09b1e4fc8b440459f62406c1addb21 (diff)
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stm32: Initial support for stm32g0
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
Diffstat (limited to 'src/stm32/stm32f0_serial.c')
-rw-r--r--src/stm32/stm32f0_serial.c17
1 files changed, 14 insertions, 3 deletions
diff --git a/src/stm32/stm32f0_serial.c b/src/stm32/stm32f0_serial.c
index 367c2991..c214ed01 100644
--- a/src/stm32/stm32f0_serial.c
+++ b/src/stm32/stm32f0_serial.c
@@ -43,9 +43,20 @@
#endif
#if CONFIG_MACH_STM32F031
-// The stm32f031 has same pins for USART2, but everything is routed to USART1
-#define USART2 USART1
-#define USART2_IRQn USART1_IRQn
+ // The stm32f031 has same pins for USART2, but everything is routed to USART1
+ #define USART2 USART1
+ #define USART2_IRQn USART1_IRQn
+#endif
+
+#if CONFIG_MACH_STM32G0
+ // The stm32g0 has slightly different register names
+ #define USART2_IRQn USART2_LPUART2_IRQn
+ #define USART_CR1_RXNEIE USART_CR1_RXNEIE_RXFNEIE
+ #define USART_CR1_TXEIE USART_CR1_TXEIE_TXFNFIE
+ #define USART_ISR_RXNE USART_ISR_RXNE_RXFNE
+ #define USART_ISR_TXE USART_ISR_TXE_TXFNF
+ #define USART_BRR_DIV_MANTISSA_Pos 4
+ #define USART_BRR_DIV_FRACTION_Pos 0
#endif
#define CR1_FLAGS (USART_CR1_UE | USART_CR1_RE | USART_CR1_TE \