From 6e8f28117b25a19c865b9ac8660c22339b2e2b76 Mon Sep 17 00:00:00 2001 From: Kevin O'Connor Date: Sat, 18 Dec 2021 19:11:17 -0500 Subject: stm32: Initial support for stm32g0 Signed-off-by: Kevin O'Connor --- src/stm32/stm32f0_serial.c | 17 ++++++++++++++--- 1 file changed, 14 insertions(+), 3 deletions(-) (limited to 'src/stm32/stm32f0_serial.c') diff --git a/src/stm32/stm32f0_serial.c b/src/stm32/stm32f0_serial.c index 367c2991..c214ed01 100644 --- a/src/stm32/stm32f0_serial.c +++ b/src/stm32/stm32f0_serial.c @@ -43,9 +43,20 @@ #endif #if CONFIG_MACH_STM32F031 -// The stm32f031 has same pins for USART2, but everything is routed to USART1 -#define USART2 USART1 -#define USART2_IRQn USART1_IRQn + // The stm32f031 has same pins for USART2, but everything is routed to USART1 + #define USART2 USART1 + #define USART2_IRQn USART1_IRQn +#endif + +#if CONFIG_MACH_STM32G0 + // The stm32g0 has slightly different register names + #define USART2_IRQn USART2_LPUART2_IRQn + #define USART_CR1_RXNEIE USART_CR1_RXNEIE_RXFNEIE + #define USART_CR1_TXEIE USART_CR1_TXEIE_TXFNFIE + #define USART_ISR_RXNE USART_ISR_RXNE_RXFNE + #define USART_ISR_TXE USART_ISR_TXE_TXFNF + #define USART_BRR_DIV_MANTISSA_Pos 4 + #define USART_BRR_DIV_FRACTION_Pos 0 #endif #define CR1_FLAGS (USART_CR1_UE | USART_CR1_RE | USART_CR1_TE \ -- cgit v1.2.3-70-g09d2