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| author | Florin Popescu <florinsgpopescu@gmail.com> | 2023-04-19 17:47:18 +0200 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2023-04-19 11:47:18 -0400 |
| commit | 40b4b34998c0708b2050c394feb383f901b76a0b (patch) | |
| tree | 1777d681ae3d033e577eb3aecacd3043676ce1e3 /src/stm32/stm32f0_serial.c | |
| parent | cba119db3a386c70caa4dc1f0a52be626792e208 (diff) | |
| download | kutter-40b4b34998c0708b2050c394feb383f901b76a0b.tar.gz kutter-40b4b34998c0708b2050c394feb383f901b76a0b.tar.xz kutter-40b4b34998c0708b2050c394feb383f901b76a0b.zip | |
stm32: Support for USART5 on STM32G0B1 (#6105)
Support for USART5 on PD2,3
Add exception on RCC bits for USART5&6
Signed-off-by: Florin Popescu <florinsgpopescu@gmail.com>
Diffstat (limited to 'src/stm32/stm32f0_serial.c')
| -rw-r--r-- | src/stm32/stm32f0_serial.c | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/src/stm32/stm32f0_serial.c b/src/stm32/stm32f0_serial.c index 4f6495f7..e48960f1 100644 --- a/src/stm32/stm32f0_serial.c +++ b/src/stm32/stm32f0_serial.c @@ -78,6 +78,13 @@ #define USARTx_FUNCTION GPIO_FUNCTION(8) #define USARTx UART4 #define USARTx_IRQn UART4_IRQn +#elif CONFIG_STM32_SERIAL_USART5 + DECL_CONSTANT_STR("RESERVE_PINS_serial", "PD2,PD3"); + #define GPIO_Rx GPIO('D', 2) + #define GPIO_Tx GPIO('D', 3) + #define USARTx_FUNCTION GPIO_FUNCTION(3) + #define USARTx USART5 + #define USARTx_IRQn USART5_IRQn #endif #if CONFIG_MACH_STM32F031 @@ -90,6 +97,10 @@ // Some of the stm32g0 MCUs have slightly different register names #if CONFIG_MACH_STM32G0B1 #define USART2_IRQn USART2_LPUART2_IRQn + #define USART3_IRQn USART3_4_5_6_LPUART1_IRQn + #define USART4_IRQn USART3_4_5_6_LPUART1_IRQn + #define USART5_IRQn USART3_4_5_6_LPUART1_IRQn + #define USART6_IRQn USART3_4_5_6_LPUART1_IRQn #endif #define USART_CR1_RXNEIE USART_CR1_RXNEIE_RXFNEIE #define USART_CR1_TXEIE USART_CR1_TXEIE_TXFNFIE |