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| author | Florin Popescu <florinsgpopescu@gmail.com> | 2023-04-19 17:47:18 +0200 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2023-04-19 11:47:18 -0400 |
| commit | 40b4b34998c0708b2050c394feb383f901b76a0b (patch) | |
| tree | 1777d681ae3d033e577eb3aecacd3043676ce1e3 | |
| parent | cba119db3a386c70caa4dc1f0a52be626792e208 (diff) | |
| download | kutter-40b4b34998c0708b2050c394feb383f901b76a0b.tar.gz kutter-40b4b34998c0708b2050c394feb383f901b76a0b.tar.xz kutter-40b4b34998c0708b2050c394feb383f901b76a0b.zip | |
stm32: Support for USART5 on STM32G0B1 (#6105)
Support for USART5 on PD2,3
Add exception on RCC bits for USART5&6
Signed-off-by: Florin Popescu <florinsgpopescu@gmail.com>
| -rw-r--r-- | src/stm32/Kconfig | 4 | ||||
| -rw-r--r-- | src/stm32/stm32f0_serial.c | 11 | ||||
| -rw-r--r-- | src/stm32/stm32g0.c | 8 |
3 files changed, 23 insertions, 0 deletions
diff --git a/src/stm32/Kconfig b/src/stm32/Kconfig index 30b2e48d..5d82f9c3 100644 --- a/src/stm32/Kconfig +++ b/src/stm32/Kconfig @@ -400,6 +400,10 @@ choice bool "Serial (on UART4 PA0/PA1)" depends on MACH_STM32H7 select SERIAL + config STM32_SERIAL_USART5 + bool "Serial (on USART5 PD2/PD3)" if LOW_LEVEL_OPTIONS + depends on MACH_STM32G0Bx + select SERIAL config STM32_CANBUS_PA11_PA12 bool "CAN bus (on PA11/PA12)" depends on HAVE_STM32_CANBUS || HAVE_STM32_FDCANBUS diff --git a/src/stm32/stm32f0_serial.c b/src/stm32/stm32f0_serial.c index 4f6495f7..e48960f1 100644 --- a/src/stm32/stm32f0_serial.c +++ b/src/stm32/stm32f0_serial.c @@ -78,6 +78,13 @@ #define USARTx_FUNCTION GPIO_FUNCTION(8) #define USARTx UART4 #define USARTx_IRQn UART4_IRQn +#elif CONFIG_STM32_SERIAL_USART5 + DECL_CONSTANT_STR("RESERVE_PINS_serial", "PD2,PD3"); + #define GPIO_Rx GPIO('D', 2) + #define GPIO_Tx GPIO('D', 3) + #define USARTx_FUNCTION GPIO_FUNCTION(3) + #define USARTx USART5 + #define USARTx_IRQn USART5_IRQn #endif #if CONFIG_MACH_STM32F031 @@ -90,6 +97,10 @@ // Some of the stm32g0 MCUs have slightly different register names #if CONFIG_MACH_STM32G0B1 #define USART2_IRQn USART2_LPUART2_IRQn + #define USART3_IRQn USART3_4_5_6_LPUART1_IRQn + #define USART4_IRQn USART3_4_5_6_LPUART1_IRQn + #define USART5_IRQn USART3_4_5_6_LPUART1_IRQn + #define USART6_IRQn USART3_4_5_6_LPUART1_IRQn #endif #define USART_CR1_RXNEIE USART_CR1_RXNEIE_RXFNEIE #define USART_CR1_TXEIE USART_CR1_TXEIE_TXFNFIE diff --git a/src/stm32/stm32g0.c b/src/stm32/stm32g0.c index b96d4a51..7408612a 100644 --- a/src/stm32/stm32g0.c +++ b/src/stm32/stm32g0.c @@ -32,6 +32,14 @@ lookup_clock_line(uint32_t periph_base) uint32_t bit = 1 << ((periph_base - AHBPERIPH_BASE) / 0x400); return (struct cline){.en=&RCC->AHBENR, .rst=&RCC->AHBRSTR, .bit=bit}; } +#ifdef USART5_BASE + if (periph_base == USART5_BASE) + return (struct cline){.en=&RCC->APBENR1,.rst=&RCC->APBRSTR1,.bit=1<<8}; +#endif +#ifdef USART6_BASE + if (periph_base == USART6_BASE) + return (struct cline){.en=&RCC->APBENR1,.rst=&RCC->APBRSTR1,.bit=1<<9}; +#endif #if defined(FDCAN1_BASE) || defined(FDCAN2_BASE) if ((periph_base == FDCAN1_BASE) || (periph_base == FDCAN2_BASE)) return (struct cline){.en=&RCC->APBENR1,.rst=&RCC->APBRSTR1,.bit=1<<12}; |