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authorKevin O'Connor <kevin@koconnor.net>2025-04-21 20:55:56 -0400
committerKevin O'Connor <kevin@koconnor.net>2025-04-28 19:36:55 -0400
commit9c37a918db03eb456dd0a6c4c072f2b544d8f569 (patch)
tree7eb44f76071c10ad74db41744fb5ec19bb8199b3 /src/stm32/fdcan.c
parentf2b68fef7324bb788d4b0dea4c2ef426ebac89bd (diff)
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stm32: Set the PLL frequency equal to CONFIG_CLOCK_FREQ on stm32h723
There is no reason to use a higher internal PLL frequency. This change also makes it possible to enable higher clock frequencies on the stm32h723. Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
Diffstat (limited to 'src/stm32/fdcan.c')
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