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| author | Alex Maclean <monkeh@monkeh.net> | 2023-12-15 22:49:07 +0000 |
|---|---|---|
| committer | KevinOConnor <kevin@koconnor.net> | 2023-12-21 20:58:57 -0500 |
| commit | 147492b25357e486bea35fbeb57405dcc47e53aa (patch) | |
| tree | e14737af2648e07166075e2de727ea726e64f261 /src/stm32/fdcan.c | |
| parent | 71ab6240f2dd8132ab29d9251690b3f8b6da0517 (diff) | |
| download | kutter-147492b25357e486bea35fbeb57405dcc47e53aa.tar.gz kutter-147492b25357e486bea35fbeb57405dcc47e53aa.tar.xz kutter-147492b25357e486bea35fbeb57405dcc47e53aa.zip | |
stm32: Fix ADC for STM32G4
At least STM32G4 requires four ADC clock cycles between hardware
clearing ADCCAL and setting ADEN or the write disappears. Make a
tenacious write attempt.
Signed-off-by: Alex Maclean <monkeh@monkeh.net>
Diffstat (limited to 'src/stm32/fdcan.c')
0 files changed, 0 insertions, 0 deletions