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| author | Kevin O'Connor <kevin@koconnor.net> | 2021-03-18 13:20:54 -0400 |
|---|---|---|
| committer | Kevin O'Connor <kevin@koconnor.net> | 2021-03-18 13:33:33 -0400 |
| commit | 1eddc0fd907fb7f28e0b4537494e711f7ac1cac4 (patch) | |
| tree | c3390bc4c024e231e9cb271231b91b3e232612ad /src/stm32/can.c | |
| parent | c8dc3afc235d9190591056a852f7ff4996c41c54 (diff) | |
| download | kutter-1eddc0fd907fb7f28e0b4537494e711f7ac1cac4.tar.gz kutter-1eddc0fd907fb7f28e0b4537494e711f7ac1cac4.tar.xz kutter-1eddc0fd907fb7f28e0b4537494e711f7ac1cac4.zip | |
stm32: Simplify USB/Serial/CANbus Kconfig selection
Combine the various communication options into a single "make
menuconfig" menu item.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
Diffstat (limited to 'src/stm32/can.c')
| -rw-r--r-- | src/stm32/can.c | 18 |
1 files changed, 9 insertions, 9 deletions
diff --git a/src/stm32/can.c b/src/stm32/can.c index 867bbfd7..360ea1ff 100644 --- a/src/stm32/can.c +++ b/src/stm32/can.c @@ -17,32 +17,32 @@ #include "internal.h" // enable_pclock #include "sched.h" // DECL_INIT -#if CONFIG_CAN_PINS_PA11_PA12 +#if CONFIG_STM32_CANBUS_PA11_PA12 || CONFIG_STM32_CANBUS_PA11_PA12_REMAP DECL_CONSTANT_STR("RESERVE_PINS_CAN", "PA11,PA12"); #define GPIO_Rx GPIO('A', 11) #define GPIO_Tx GPIO('A', 12) #endif -#if CONFIG_CAN_PINS_PB8_PB9 +#if CONFIG_STM32_CANBUS_PB8_PB9 DECL_CONSTANT_STR("RESERVE_PINS_CAN", "PB8,PB9"); #define GPIO_Rx GPIO('B', 8) #define GPIO_Tx GPIO('B', 9) #endif -#if CONFIG_CAN_PINS_PI8_PH13 +#if CONFIG_STM32_CANBUS_PI8_PH13 DECL_CONSTANT_STR("RESERVE_PINS_CAN", "PI9,PH13"); #define GPIO_Rx GPIO('I', 9) #define GPIO_Tx GPIO('H', 13) #endif -#if CONFIG_CAN_PINS_PB5_PB6 +#if CONFIG_STM32_CANBUS_PB5_PB6 DECL_CONSTANT_STR("RESERVE_PINS_CAN", "PB5,PB6"); #define GPIO_Rx GPIO('B', 5) #define GPIO_Tx GPIO('B', 6) #endif -#if CONFIG_CAN_PINS_PB12_PB13 +#if CONFIG_STM32_CANBUS_PB12_PB13 DECL_CONSTANT_STR("RESERVE_PINS_CAN", "PB12,PB13"); #define GPIO_Rx GPIO('B', 12) #define GPIO_Tx GPIO('B', 13) #endif -#if CONFIG_CAN_PINS_PD0_PD1 +#if CONFIG_STM32_CANBUS_PD0_PD1 DECL_CONSTANT_STR("RESERVE_PINS_CAN", "PD0,PD1"); #define GPIO_Rx GPIO('D', 0) #define GPIO_Tx GPIO('D', 1) @@ -68,14 +68,14 @@ #if CONFIG_MACH_STM32F4 #warning CAN on STM32F4 is untested - #if (CONFIG_CAN_PINS_PA11_PA12 || CONFIG_CAN_PINS_PB8_PB9 \ - || CONFIG_CAN_PINS_PD0_PD1 || CONFIG_CAN_PINS_PI9_PH13) + #if (CONFIG_STM32_CANBUS_PA11_PA12 || CONFIG_STM32_CANBUS_PB8_PB9 \ + || CONFIG_STM32_CANBUS_PD0_PD1 || CONFIG_STM32_CANBUS_PI9_PH13) #define SOC_CAN CAN1 #define CAN_RX0_IRQn CAN1_RX0_IRQn #define CAN_RX1_IRQn CAN1_RX1_IRQn #define CAN_TX_IRQn CAN1_TX_IRQn #define CAN_SCE_IRQn CAN1_SCE_IRQn - #elif CONFIG_CAN_PINS_PB5_PB6 || CONFIG_CAN_PINS_PB12_PB13 + #elif CONFIG_STM32_CANBUS_PB5_PB6 || CONFIG_STM32_CANBUS_PB12_PB13 #define SOC_CAN CAN2 #define CAN_RX0_IRQn CAN2_RX0_IRQn #define CAN_RX1_IRQn CAN2_RX1_IRQn |