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authorKevin O'Connor <kevin@koconnor.net>2021-03-18 13:20:54 -0400
committerKevin O'Connor <kevin@koconnor.net>2021-03-18 13:33:33 -0400
commit1eddc0fd907fb7f28e0b4537494e711f7ac1cac4 (patch)
treec3390bc4c024e231e9cb271231b91b3e232612ad /src
parentc8dc3afc235d9190591056a852f7ff4996c41c54 (diff)
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stm32: Simplify USB/Serial/CANbus Kconfig selection
Combine the various communication options into a single "make menuconfig" menu item. Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
Diffstat (limited to 'src')
-rw-r--r--src/stm32/Kconfig129
-rw-r--r--src/stm32/can.c18
-rw-r--r--src/stm32/serial.c24
-rw-r--r--src/stm32/stm32f0.c3
-rw-r--r--src/stm32/stm32f0_serial.c40
5 files changed, 116 insertions, 98 deletions
diff --git a/src/stm32/Kconfig b/src/stm32/Kconfig
index 646eb8bc..f2b16d4d 100644
--- a/src/stm32/Kconfig
+++ b/src/stm32/Kconfig
@@ -17,6 +17,11 @@ config BOARD_DIRECTORY
string
default "stm32"
+
+######################################################################
+# Chip selection
+######################################################################
+
choice
prompt "Processor model"
config MACH_STM32F103
@@ -61,12 +66,13 @@ config MACH_STM32F4
bool
config HAVE_STM32_USBFS
bool
- default y if MACH_STM32F103 || MACH_STM32F0
- default n
+ default y if MACH_STM32F103 || MACH_STM32F042 || MACH_STM32F070
config HAVE_STM32_USBOTG
bool
default y if MACH_STM32F2 || MACH_STM32F4
- default n
+config HAVE_STM32_CANBUS
+ bool
+ default y if MACH_STM32F1 || MACH_STM32F2 || MACH_STM32F4 || MACH_STM32F042
config MCU
string
@@ -118,6 +124,11 @@ config STACK_SIZE
int
default 512
+
+######################################################################
+# Bootloader
+######################################################################
+
choice
prompt "Bootloader offset" if MACH_STM32F207 || MACH_STM32F407 || MACH_STM32F405 || MACH_STM32F103 || MACH_STM32F070
config STM32_FLASH_START_2000
@@ -161,6 +172,11 @@ config ARMCM_RAM_VECTORTABLE
default y if MACH_STM32F0 && FLASH_START != 0x8000000
default n
+
+######################################################################
+# Clock
+######################################################################
+
choice
prompt "Clock Reference" if LOW_LEVEL_OPTIONS
config STM32_CLOCK_REF_8M
@@ -182,35 +198,6 @@ config CLOCK_REF_FREQ
default 1 if STM32_CLOCK_REF_INTERNAL
default 8000000
-config USBSERIAL
- bool "Use USB for communication (instead of serial)"
- depends on HAVE_STM32_USBFS || HAVE_STM32_USBOTG
- default y
-
-config CANSERIAL
- bool "Use CAN for communication (instead of serial)"
- depends on !USBSERIAL
- default n
-config CANBUS_FREQUENCY
- int "CAN bus speed" if LOW_LEVEL_OPTIONS && CANSERIAL
- default 500000
-choice
- depends on CANSERIAL
- prompt "CAN pins"
- config CAN_PINS_PA11_PA12
- bool "Pins PA11(rx) and PA12(tx)"
- config CAN_PINS_PB8_PB9
- bool "Pins PB8(rx) and PB9(tx)"
- config CAN_PINS_PI8_PH13
- bool "Pins PI9(rx) and PH13(tx)" if MACH_STM32F4
- config CAN_PINS_PB5_PB6
- bool "Pins PB5(rx) and PB6(tx)" if MACH_STM32F4
- config CAN_PINS_PB12_PB13
- bool "Pins PB12(rx) and PB13(tx)" if MACH_STM32F4
- config CAN_PINS_PD0_PD1
- bool "Pins PD0(rx) and PD1(tx)" if MACH_STM32F4
-endchoice
-
config STM32F0_TRIM
int "Internal clock trim override" if LOW_LEVEL_OPTIONS && MACH_STM32F0 && STM32_CLOCK_REF_INTERNAL && !USBSERIAL
default 16
@@ -220,39 +207,69 @@ config STM32F0_TRIM
Default is 16 (use factory default). Each increment increases
the clock rate by ~240KHz.
-config STM32F042_PIN_SWAP
- bool "Use PA9/PA10 for USB or CAN" if MACH_STM32F042
- depends on (USBSERIAL || CANSERIAL) && MACH_STM32F042
- default y if (USBSERIAL || CANSERIAL)
- default n
- help
- Remaps logical pins PA11/PA12 to physical PA9/PA10 on low pincount F042 devices.
+
+######################################################################
+# Communication inteface
+######################################################################
+
+config USBSERIAL
+ bool
config SERIAL
- depends on !USBSERIAL && !CANSERIAL
bool
- default y
+config CANSERIAL
+ bool
choice
- depends on SERIAL
- prompt "Serial Port" if LOW_LEVEL_OPTIONS
- help
- Select the serial device to use.
+ prompt "Communication interface"
+ config STM32_USB_PA11_PA12
+ bool "USB (on PA11/PA12)" if HAVE_STM32_USBFS || HAVE_STM32_USBOTG
+ select USBSERIAL
+ config STM32_USB_PA11_PA12_REMAP
+ bool "USB (on PA9/PA10)" if LOW_LEVEL_OPTIONS && MACH_STM32F042
+ select USBSERIAL
config STM32_SERIAL_USART1
- bool "USART1"
+ bool "Serial (on USART1 PA10/PA9)"
+ select SERIAL
config STM32_SERIAL_USART1_ALT
- bool "USART1 (on PA15/PA14)" if MACH_STM32F0
+ bool "Serial (on USART1 PA15/PA14)" if LOW_LEVEL_OPTIONS && MACH_STM32F0
+ select SERIAL
config STM32_SERIAL_USART2
- bool "USART2 (on PA3/PA2)"
+ bool "Serial (on USART2 PA3/PA2)" if LOW_LEVEL_OPTIONS
+ select SERIAL
config STM32_SERIAL_USART2_ALT
- bool "USART2 (on PA15/PA14)" if MACH_STM32F0
+ bool "Serial (on USART2 PA15/PA14)" if LOW_LEVEL_OPTIONS && MACH_STM32F0
+ select SERIAL
config STM32_SERIAL_USART3
- bool "USART3"
+ bool "Serial (on USART3 PB11/PB10)" if LOW_LEVEL_OPTIONS && !MACH_STM32F0
+ select SERIAL
config STM32_SERIAL_USART3_ALT
- bool "USART3 (on PD9/PD8)" if MACH_STM32F405 || MACH_STM32F407
+ depends on LOW_LEVEL_OPTIONS && (MACH_STM32F405 || MACH_STM32F407)
+ bool "Serial (on USART3 PD9/PD8)"
+ select SERIAL
+ config STM32_CANBUS_PA11_PA12
+ bool "CAN bus (on PA11/PA12)" if HAVE_STM32_CANBUS
+ select CANSERIAL
+ config STM32_CANBUS_PA11_PA12_REMAP
+ bool "CAN bus (on PA9/PA10)" if LOW_LEVEL_OPTIONS && MACH_STM32F042
+ select CANSERIAL
+ config STM32_CANBUS_PB8_PB9
+ bool "CAN bus (on PB8/PB9)" if LOW_LEVEL_OPTIONS && HAVE_STM32_CANBUS
+ select CANSERIAL
+ config STM32_CANBUS_PI8_PH13
+ bool "CAN bus (on PI9/PH13)" if LOW_LEVEL_OPTIONS && MACH_STM32F4
+ select CANSERIAL
+ config STM32_CANBUS_PB5_PB6
+ bool "CAN bus (on PB5/PB6)" if LOW_LEVEL_OPTIONS && MACH_STM32F4
+ select CANSERIAL
+ config STM32_CANBUS_PB12_PB13
+ bool "CAN bus (on PB12/PB13)" if LOW_LEVEL_OPTIONS && MACH_STM32F4
+ select CANSERIAL
+ config STM32_CANBUS_PD0_PD1
+ bool "CAN bus (on PD0/PD1)" if LOW_LEVEL_OPTIONS && MACH_STM32F4
+ select CANSERIAL
endchoice
-config SERIAL_PORT
- int
- default 3 if STM32_SERIAL_USART3 || STM32_SERIAL_USART3_ALT
- default 2 if STM32_SERIAL_USART2 || STM32_SERIAL_USART2_ALT
- default 1
+
+config CANBUS_FREQUENCY
+ int "CAN bus speed" if LOW_LEVEL_OPTIONS && CANSERIAL
+ default 500000
endif
diff --git a/src/stm32/can.c b/src/stm32/can.c
index 867bbfd7..360ea1ff 100644
--- a/src/stm32/can.c
+++ b/src/stm32/can.c
@@ -17,32 +17,32 @@
#include "internal.h" // enable_pclock
#include "sched.h" // DECL_INIT
-#if CONFIG_CAN_PINS_PA11_PA12
+#if CONFIG_STM32_CANBUS_PA11_PA12 || CONFIG_STM32_CANBUS_PA11_PA12_REMAP
DECL_CONSTANT_STR("RESERVE_PINS_CAN", "PA11,PA12");
#define GPIO_Rx GPIO('A', 11)
#define GPIO_Tx GPIO('A', 12)
#endif
-#if CONFIG_CAN_PINS_PB8_PB9
+#if CONFIG_STM32_CANBUS_PB8_PB9
DECL_CONSTANT_STR("RESERVE_PINS_CAN", "PB8,PB9");
#define GPIO_Rx GPIO('B', 8)
#define GPIO_Tx GPIO('B', 9)
#endif
-#if CONFIG_CAN_PINS_PI8_PH13
+#if CONFIG_STM32_CANBUS_PI8_PH13
DECL_CONSTANT_STR("RESERVE_PINS_CAN", "PI9,PH13");
#define GPIO_Rx GPIO('I', 9)
#define GPIO_Tx GPIO('H', 13)
#endif
-#if CONFIG_CAN_PINS_PB5_PB6
+#if CONFIG_STM32_CANBUS_PB5_PB6
DECL_CONSTANT_STR("RESERVE_PINS_CAN", "PB5,PB6");
#define GPIO_Rx GPIO('B', 5)
#define GPIO_Tx GPIO('B', 6)
#endif
-#if CONFIG_CAN_PINS_PB12_PB13
+#if CONFIG_STM32_CANBUS_PB12_PB13
DECL_CONSTANT_STR("RESERVE_PINS_CAN", "PB12,PB13");
#define GPIO_Rx GPIO('B', 12)
#define GPIO_Tx GPIO('B', 13)
#endif
-#if CONFIG_CAN_PINS_PD0_PD1
+#if CONFIG_STM32_CANBUS_PD0_PD1
DECL_CONSTANT_STR("RESERVE_PINS_CAN", "PD0,PD1");
#define GPIO_Rx GPIO('D', 0)
#define GPIO_Tx GPIO('D', 1)
@@ -68,14 +68,14 @@
#if CONFIG_MACH_STM32F4
#warning CAN on STM32F4 is untested
- #if (CONFIG_CAN_PINS_PA11_PA12 || CONFIG_CAN_PINS_PB8_PB9 \
- || CONFIG_CAN_PINS_PD0_PD1 || CONFIG_CAN_PINS_PI9_PH13)
+ #if (CONFIG_STM32_CANBUS_PA11_PA12 || CONFIG_STM32_CANBUS_PB8_PB9 \
+ || CONFIG_STM32_CANBUS_PD0_PD1 || CONFIG_STM32_CANBUS_PI9_PH13)
#define SOC_CAN CAN1
#define CAN_RX0_IRQn CAN1_RX0_IRQn
#define CAN_RX1_IRQn CAN1_RX1_IRQn
#define CAN_TX_IRQn CAN1_TX_IRQn
#define CAN_SCE_IRQn CAN1_SCE_IRQn
- #elif CONFIG_CAN_PINS_PB5_PB6 || CONFIG_CAN_PINS_PB12_PB13
+ #elif CONFIG_STM32_CANBUS_PB5_PB6 || CONFIG_STM32_CANBUS_PB12_PB13
#define SOC_CAN CAN2
#define CAN_RX0_IRQn CAN2_RX0_IRQn
#define CAN_RX1_IRQn CAN2_RX1_IRQn
diff --git a/src/stm32/serial.c b/src/stm32/serial.c
index 9c3e7e84..2e11304e 100644
--- a/src/stm32/serial.c
+++ b/src/stm32/serial.c
@@ -12,28 +12,28 @@
#include "sched.h" // DECL_INIT
// Select the configured serial port
-#if CONFIG_SERIAL_PORT == 1
+#if CONFIG_STM32_SERIAL_USART1
DECL_CONSTANT_STR("RESERVE_PINS_serial", "PA10,PA9");
#define GPIO_Rx GPIO('A', 10)
#define GPIO_Tx GPIO('A', 9)
#define USARTx USART1
#define USARTx_IRQn USART1_IRQn
-#elif CONFIG_SERIAL_PORT == 2
+#elif CONFIG_STM32_SERIAL_USART2
DECL_CONSTANT_STR("RESERVE_PINS_serial", "PA3,PA2");
#define GPIO_Rx GPIO('A', 3)
#define GPIO_Tx GPIO('A', 2)
#define USARTx USART2
#define USARTx_IRQn USART2_IRQn
-#elif CONFIG_SERIAL_PORT == 3
- #if CONFIG_STM32_SERIAL_USART3_ALT
- DECL_CONSTANT_STR("RESERVE_PINS_serial", "PD9,PD8");
- #define GPIO_Rx GPIO('D', 9)
- #define GPIO_Tx GPIO('D', 8)
- #else
- DECL_CONSTANT_STR("RESERVE_PINS_serial", "PB11,PB10");
- #define GPIO_Rx GPIO('B', 11)
- #define GPIO_Tx GPIO('B', 10)
- #endif
+#elif CONFIG_STM32_SERIAL_USART3
+ DECL_CONSTANT_STR("RESERVE_PINS_serial", "PB11,PB10");
+ #define GPIO_Rx GPIO('B', 11)
+ #define GPIO_Tx GPIO('B', 10)
+ #define USARTx USART3
+ #define USARTx_IRQn USART3_IRQn
+#elif CONFIG_STM32_SERIAL_USART3_ALT
+ DECL_CONSTANT_STR("RESERVE_PINS_serial", "PD9,PD8");
+ #define GPIO_Rx GPIO('D', 9)
+ #define GPIO_Tx GPIO('D', 8)
#define USARTx USART3
#define USARTx_IRQn USART3_IRQn
#endif
diff --git a/src/stm32/stm32f0.c b/src/stm32/stm32f0.c
index b876db35..a2a3a52f 100644
--- a/src/stm32/stm32f0.c
+++ b/src/stm32/stm32f0.c
@@ -224,7 +224,8 @@ armcm_main(void)
// Support pin remapping USB/CAN pins on low pinout stm32f042
#ifdef SYSCFG_CFGR1_PA11_PA12_RMP
- if (CONFIG_STM32F042_PIN_SWAP) {
+ if (CONFIG_STM32_USB_PA11_PA12_REMAP
+ || CONFIG_STM32_CANBUS_PA11_PA12_REMAP) {
enable_pclock(SYSCFG_BASE);
SYSCFG->CFGR1 |= SYSCFG_CFGR1_PA11_PA12_RMP;
}
diff --git a/src/stm32/stm32f0_serial.c b/src/stm32/stm32f0_serial.c
index 5736e109..4a299441 100644
--- a/src/stm32/stm32f0_serial.c
+++ b/src/stm32/stm32f0_serial.c
@@ -12,28 +12,28 @@
#include "sched.h" // DECL_INIT
// Select the configured serial port
-#if CONFIG_SERIAL_PORT == 1
- #if CONFIG_STM32_SERIAL_USART1_ALT
- DECL_CONSTANT_STR("RESERVE_PINS_serial", "PA15,PA14");
- #define GPIO_Rx GPIO('A', 15)
- #define GPIO_Tx GPIO('A', 14)
- #else
- DECL_CONSTANT_STR("RESERVE_PINS_serial", "PA10,PA9");
- #define GPIO_Rx GPIO('A', 10)
- #define GPIO_Tx GPIO('A', 9)
- #endif
+#if CONFIG_STM32_SERIAL_USART1
+ DECL_CONSTANT_STR("RESERVE_PINS_serial", "PA10,PA9");
+ #define GPIO_Rx GPIO('A', 10)
+ #define GPIO_Tx GPIO('A', 9)
#define USARTx USART1
#define USARTx_IRQn USART1_IRQn
-#elif CONFIG_SERIAL_PORT == 2
- #if CONFIG_STM32_SERIAL_USART2_ALT
- DECL_CONSTANT_STR("RESERVE_PINS_serial", "PA15,PA14");
- #define GPIO_Rx GPIO('A', 15)
- #define GPIO_Tx GPIO('A', 14)
- #else
- DECL_CONSTANT_STR("RESERVE_PINS_serial", "PA3,PA2");
- #define GPIO_Rx GPIO('A', 3)
- #define GPIO_Tx GPIO('A', 2)
- #endif
+#elif CONFIG_STM32_SERIAL_USART1_ALT
+ DECL_CONSTANT_STR("RESERVE_PINS_serial", "PA15,PA14");
+ #define GPIO_Rx GPIO('A', 15)
+ #define GPIO_Tx GPIO('A', 14)
+ #define USARTx USART1
+ #define USARTx_IRQn USART1_IRQn
+#elif CONFIG_STM32_SERIAL_USART2
+ DECL_CONSTANT_STR("RESERVE_PINS_serial", "PA3,PA2");
+ #define GPIO_Rx GPIO('A', 3)
+ #define GPIO_Tx GPIO('A', 2)
+ #define USARTx USART2
+ #define USARTx_IRQn USART2_IRQn
+#elif CONFIG_STM32_SERIAL_USART2_ALT
+ DECL_CONSTANT_STR("RESERVE_PINS_serial", "PA15,PA14");
+ #define GPIO_Rx GPIO('A', 15)
+ #define GPIO_Tx GPIO('A', 14)
#define USARTx USART2
#define USARTx_IRQn USART2_IRQn
#endif