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authorKevin O'Connor <kevin@koconnor.net>2024-10-25 14:04:48 -0400
committerKevin O'Connor <kevin@koconnor.net>2024-11-13 14:25:59 -0500
commit906431bb00b9f65c223160cf74859f4053de34a4 (patch)
tree844500ef7a8cbccca74f63f13636f30333a335c3 /src/rp2040
parent4ef21a1e9b8b9c7c30cdd037107f64e8f1dd55c6 (diff)
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rp2040: Rename CONFIG_RP2040_yyy Kconfig symbols to CONFIG_RPXXXX_yyy
Rename the Kconfig symbols. This is in preparation to adding support for the rp2350 mcu. Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
Diffstat (limited to 'src/rp2040')
-rw-r--r--src/rp2040/Kconfig50
-rw-r--r--src/rp2040/Makefile4
-rw-r--r--src/rp2040/can.c6
-rw-r--r--src/rp2040/serial.c16
4 files changed, 43 insertions, 33 deletions
diff --git a/src/rp2040/Kconfig b/src/rp2040/Kconfig
index ec8a1af3..bec96336 100644
--- a/src/rp2040/Kconfig
+++ b/src/rp2040/Kconfig
@@ -1,8 +1,8 @@
-# Kconfig settings for RP2040 processors
+# Kconfig settings for RPxxxx processors
-if MACH_RP2040
+if MACH_RPXXXX
-config RP2040_SELECT
+config RPXXXX_SELECT
bool
default y
select HAVE_GPIO
@@ -19,6 +19,16 @@ config BOARD_DIRECTORY
string
default "rp2040"
+######################################################################
+# Chip selection
+######################################################################
+
+choice
+ prompt "Processor model"
+ config MACH_RP2040
+ bool "rp2040"
+endchoice
+
config MCU
string
default "rp2040"
@@ -54,21 +64,21 @@ config STACK_SIZE
config RP2040_HAVE_STAGE2
bool
-config RP2040_HAVE_BOOTLOADER
+config RPXXXX_HAVE_BOOTLOADER
bool
default y if !RP2040_HAVE_STAGE2
choice
prompt "Bootloader offset"
- config RP2040_FLASH_START_0100
+ config RPXXXX_FLASH_START_0100
bool "No bootloader"
select RP2040_HAVE_STAGE2
- config RP2040_FLASH_START_4000
+ config RPXXXX_FLASH_START_4000
bool "16KiB bootloader"
endchoice
config FLASH_APPLICATION_ADDRESS
hex
- default 0x10004000 if RP2040_FLASH_START_4000
+ default 0x10004000 if RPXXXX_FLASH_START_4000
default 0x10000100
choice
@@ -96,47 +106,47 @@ config RP2040_STAGE2_CLKDIV
choice
prompt "Communication Interface"
- config RP2040_USB
+ config RPXXXX_USB
bool "USBSERIAL"
select USBSERIAL
- config RP2040_SERIAL_UART0_PINS_0_1
+ config RPXXXX_SERIAL_UART0_PINS_0_1
bool "UART0 on GPIO0/GPIO1"
select SERIAL
- config RP2040_SERIAL_UART0_PINS_12_13
+ config RPXXXX_SERIAL_UART0_PINS_12_13
bool "UART0 on GPIO12/GPIO13" if LOW_LEVEL_OPTIONS
select SERIAL
- config RP2040_SERIAL_UART0_PINS_16_17
+ config RPXXXX_SERIAL_UART0_PINS_16_17
bool "UART0 on GPIO16/GPIO17" if LOW_LEVEL_OPTIONS
select SERIAL
- config RP2040_SERIAL_UART0_PINS_28_29
+ config RPXXXX_SERIAL_UART0_PINS_28_29
bool "UART0 on GPIO28/GPIO29" if LOW_LEVEL_OPTIONS
select SERIAL
- config RP2040_SERIAL_UART1_PINS_4_5
+ config RPXXXX_SERIAL_UART1_PINS_4_5
bool "UART1 on GPIO4/GPIO5" if LOW_LEVEL_OPTIONS
select SERIAL
- config RP2040_SERIAL_UART1_PINS_8_9
+ config RPXXXX_SERIAL_UART1_PINS_8_9
bool "UART1 on GPIO8/GPIO9" if LOW_LEVEL_OPTIONS
select SERIAL
- config RP2040_SERIAL_UART1_PINS_20_21
+ config RPXXXX_SERIAL_UART1_PINS_20_21
bool "UART1 on GPIO20/GPIO21" if LOW_LEVEL_OPTIONS
select SERIAL
- config RP2040_SERIAL_UART1_PINS_24_25
+ config RPXXXX_SERIAL_UART1_PINS_24_25
bool "UART1 on GPIO24/GPIO25" if LOW_LEVEL_OPTIONS
select SERIAL
- config RP2040_CANBUS
+ config RPXXXX_CANBUS
bool "CAN bus"
select CANSERIAL
- config RP2040_USBCANBUS
+ config RPXXXX_USBCANBUS
bool "USB to CAN bus bridge"
select USBCANBUS
endchoice
-config RP2040_CANBUS_GPIO_RX
+config RPXXXX_CANBUS_GPIO_RX
int "CAN RX gpio number" if CANBUS
default 4
range 0 29
-config RP2040_CANBUS_GPIO_TX
+config RPXXXX_CANBUS_GPIO_TX
int "CAN TX gpio number" if CANBUS
default 5
range 0 29
diff --git a/src/rp2040/Makefile b/src/rp2040/Makefile
index 83c43e72..b9ac8e87 100644
--- a/src/rp2040/Makefile
+++ b/src/rp2040/Makefile
@@ -1,4 +1,4 @@
-# Additional RP2040 build rules
+# Additional RPxxxx Raspberry Pi MCU build rules
# Setup the toolchain
CROSS_PREFIX=arm-none-eabi-
@@ -58,7 +58,7 @@ $(OUT)klipper.bin: $(OUT)klipper.elf
@echo " Creating bin file $@"
$(Q)$(OBJCOPY) -O binary $< $@
-rptarget-$(CONFIG_RP2040_HAVE_BOOTLOADER) := $(OUT)klipper.bin
+rptarget-$(CONFIG_RPXXXX_HAVE_BOOTLOADER) := $(OUT)klipper.bin
# Set klipper.elf linker rules
target-y += $(rptarget-y)
diff --git a/src/rp2040/can.c b/src/rp2040/can.c
index 6cae2a7f..1f4c281e 100644
--- a/src/rp2040/can.c
+++ b/src/rp2040/can.c
@@ -18,8 +18,8 @@
#include "internal.h" // DMA_IRQ_0_IRQn
#include "sched.h" // DECL_INIT
-#define GPIO_STR_CAN_RX "gpio" __stringify(CONFIG_RP2040_CANBUS_GPIO_RX)
-#define GPIO_STR_CAN_TX "gpio" __stringify(CONFIG_RP2040_CANBUS_GPIO_TX)
+#define GPIO_STR_CAN_RX "gpio" __stringify(CONFIG_RPXXXX_CANBUS_GPIO_RX)
+#define GPIO_STR_CAN_TX "gpio" __stringify(CONFIG_RPXXXX_CANBUS_GPIO_TX)
DECL_CONSTANT_STR("RESERVE_PINS_CAN", GPIO_STR_CAN_RX "," GPIO_STR_CAN_TX);
static struct can2040 cbus;
@@ -73,6 +73,6 @@ can_init(void)
// Start canbus
uint32_t pclk = get_pclock_frequency(RESETS_RESET_PIO0_RESET);
can2040_start(&cbus, pclk, CONFIG_CANBUS_FREQUENCY
- , CONFIG_RP2040_CANBUS_GPIO_RX, CONFIG_RP2040_CANBUS_GPIO_TX);
+ , CONFIG_RPXXXX_CANBUS_GPIO_RX, CONFIG_RPXXXX_CANBUS_GPIO_TX);
}
DECL_INIT(can_init);
diff --git a/src/rp2040/serial.c b/src/rp2040/serial.c
index 351a873e..1c236977 100644
--- a/src/rp2040/serial.c
+++ b/src/rp2040/serial.c
@@ -18,44 +18,44 @@
// Dynamically select UART and IRQ based on configuration
- #if CONFIG_RP2040_SERIAL_UART0_PINS_0_1
+ #if CONFIG_RPXXXX_SERIAL_UART0_PINS_0_1
#define GPIO_Rx 1
#define GPIO_Tx 0
#define UARTx uart0_hw
#define UARTx_IRQn UART0_IRQ_IRQn
- #elif CONFIG_RP2040_SERIAL_UART0_PINS_12_13
+ #elif CONFIG_RPXXXX_SERIAL_UART0_PINS_12_13
#define GPIO_Rx 13
#define GPIO_Tx 12
#define UARTx uart0_hw
#define UARTx_IRQn UART0_IRQ_IRQn
- #elif CONFIG_RP2040_SERIAL_UART0_PINS_16_17
+ #elif CONFIG_RPXXXX_SERIAL_UART0_PINS_16_17
#define GPIO_Rx 17
#define GPIO_Tx 16
#define UARTx uart0_hw
#define UARTx_IRQn UART0_IRQ_IRQn
- #elif CONFIG_RP2040_SERIAL_UART0_PINS_28_29
+ #elif CONFIG_RPXXXX_SERIAL_UART0_PINS_28_29
#define GPIO_Rx 29
#define GPIO_Tx 28
#define UARTx uart1_hw
#define UARTx_IRQn UART1_IRQ_IRQn
#define UARTx uart0_hw
#define UARTx_IRQn UART0_IRQ_IRQn
- #elif CONFIG_RP2040_SERIAL_UART1_PINS_4_5
+ #elif CONFIG_RPXXXX_SERIAL_UART1_PINS_4_5
#define GPIO_Rx 5
#define GPIO_Tx 4
#define UARTx uart1_hw
#define UARTx_IRQn UART1_IRQ_IRQn
- #elif CONFIG_RP2040_SERIAL_UART1_PINS_8_9
+ #elif CONFIG_RPXXXX_SERIAL_UART1_PINS_8_9
#define GPIO_Rx 9
#define GPIO_Tx 8
#define UARTx uart1_hw
#define UARTx_IRQn UART1_IRQ_IRQn
- #elif CONFIG_RP2040_SERIAL_UART1_PINS_20_21
+ #elif CONFIG_RPXXXX_SERIAL_UART1_PINS_20_21
#define GPIO_Rx 20
#define GPIO_Tx 21
#define UARTx uart1_hw
#define UARTx_IRQn UART1_IRQ_IRQn
- #elif CONFIG_RP2040_SERIAL_UART1_PINS_24_25
+ #elif CONFIG_RPXXXX_SERIAL_UART1_PINS_24_25
#define GPIO_Rx 24
#define GPIO_Tx 25
#define UARTx uart1_hw