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authorKevin O'Connor <kevin@koconnor.net>2019-03-02 12:01:44 -0500
committerKevin O'Connor <kevin@koconnor.net>2019-03-02 12:01:44 -0500
commit399d53996994f9f716979b489064989bc49079bf (patch)
tree00a14649ddd4249005dcb38c1e8874aec744f57b /src/pru
parent9430fea2c551dad91815df021510a19190df6d97 (diff)
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Makefile: Reduce use of $^ in build rules
It's rare to use all of a target's prerequisites in a recipe - replace most cases with $< (the target's first prerequisite). Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
Diffstat (limited to 'src/pru')
-rw-r--r--src/pru/Makefile2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/pru/Makefile b/src/pru/Makefile
index 38f262ec..5fea9e17 100644
--- a/src/pru/Makefile
+++ b/src/pru/Makefile
@@ -31,7 +31,7 @@ $(OUT)pru0.elf: $(patsubst %.c, $(OUT)src/%.o,$(pru0-y))
$(OUT)pru1.elf: $(OUT)klipper.elf
@echo " Linking $@"
- $(Q)$(CC) $(CFLAGS_pru1.elf) $^ -o $@
+ $(Q)$(CC) $(CFLAGS_pru1.elf) $< -o $@
flash: $(OUT)pru0.elf $(OUT)pru1.elf
@echo " Flashing"