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| author | Kevin O'Connor <kevin@koconnor.net> | 2018-10-03 11:55:08 -0400 |
|---|---|---|
| committer | Kevin O'Connor <kevin@koconnor.net> | 2018-10-11 10:50:51 -0400 |
| commit | 1302514ea8723f05fc0a9ccdbc9cf45c4fa80f81 (patch) | |
| tree | 3ae49decd9347cbaecd11f6ccb475a04dd18249a | |
| parent | d32506bd2eb6c5231d83b063ad528a26f0dda563 (diff) | |
| download | kutter-1302514ea8723f05fc0a9ccdbc9cf45c4fa80f81.tar.gz kutter-1302514ea8723f05fc0a9ccdbc9cf45c4fa80f81.tar.xz kutter-1302514ea8723f05fc0a9ccdbc9cf45c4fa80f81.zip | |
stm32f1: Serial should have a higher irq priority than timers
It's possible for the code to stay in the timer irq for up to 100ms,
so serial irqs should have a higher irq priority to prevent them from
being starved. (The timer code disables irqs during event dispatch,
so serial irqs would only be permitted between events anyway.)
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
| -rw-r--r-- | src/stm32f1/serial.c | 2 | ||||
| -rw-r--r-- | src/stm32f1/timer.c | 3 |
2 files changed, 2 insertions, 3 deletions
diff --git a/src/stm32f1/serial.c b/src/stm32f1/serial.c index bc6ebb94..cfc5d04d 100644 --- a/src/stm32f1/serial.c +++ b/src/stm32f1/serial.c @@ -29,8 +29,8 @@ serial_init(void) LL_USART_SetHWFlowCtrl(USART1, LL_USART_HWCONTROL_NONE); LL_USART_SetTransferDirection(USART1, LL_USART_DIRECTION_TX_RX); LL_USART_EnableIT_RXNE(USART1); + NVIC_SetPriority(USART1_IRQn, 0); NVIC_EnableIRQ(USART1_IRQn); - NVIC_SetPriority(USART1_IRQn, 1); LL_USART_Enable(USART1); LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_GPIOA); diff --git a/src/stm32f1/timer.c b/src/stm32f1/timer.c index b0549136..e9b96b0a 100644 --- a/src/stm32f1/timer.c +++ b/src/stm32f1/timer.c @@ -8,7 +8,6 @@ #include "autoconf.h" #include "board/misc.h" // timer_from_us #include "stm32f1xx.h" -#include "stm32f1xx.h" #include "stm32f1xx_ll_bus.h" #include "stm32f1xx_ll_tim.h" #include "command.h" // shutdown @@ -96,8 +95,8 @@ timer_init(void) LL_TIM_SetAutoReload(TIM2, 0xFFFF); LL_TIM_EnableIT_CC1(TIM2); LL_TIM_CC_EnableChannel(TIM2, LL_TIM_CHANNEL_CH1); + NVIC_SetPriority(TIM2_IRQn, 2); NVIC_EnableIRQ(TIM2_IRQn); - NVIC_SetPriority(TIM2_IRQn, 0); timer_kick(); timer_reset(); LL_TIM_EnableCounter(TIM2); |