diff options
Diffstat (limited to 'reg/pit.h')
| -rw-r--r-- | reg/pit.h | 30 |
1 files changed, 20 insertions, 10 deletions
@@ -5,27 +5,37 @@ // PIT Module Control Register #define PIT_MCR REG_32(0x40037000) -#define MCR_MDIS 1 // Module Disable -#define MCR_FRZ 0 // Freeze +enum { + MCR_MDIS = 1, // Module Disable + MCR_FRZ = 0, // Freeze +}; // Timer Load Value Register #define PIT_LDVAL(n) REG_32(0x40037100 + 16 * (n)) -#define LDVAL_TSV 0 // Timer Start Value -#define LDVAL_TSV_M REG_32_M(CVAL_TVL, 32) +enum { + LDVAL_TSV = 0, // Timer Start Value + LDVAL_TSV_M = REG_32_M(CVAL_TVL, 32), +}; // Current Timer Value Register #define PIT_CVAL(n) REG_32(0x40037104 + 16 * (n)) -#define CVAL_TVL 0 // Current Timer Value -#define CVAL_TVL_M REG_32_M(CVAL_TVL, 32) +enum { + CVAL_TVL = 0, // Current Timer Value + CVAL_TVL_M = REG_32_M(CVAL_TVL, 32), +}; // Timer Control Register #define PIT_TCTRL(n) REG_32(0x40037108 + 16 * (n)) -#define TCTRL_CHN 2 // Chain Mode -#define TCTRL_TIE 1 // Timer Interrupt Enable -#define TCTRL_TEN 0 // Timer Enable +enum { + TCTRL_CHN = 2, // Chain Mode + TCTRL_TIE = 1, // Timer Interrupt Enable + TCTRL_TEN = 0, // Timer Enable +}; // Timer Flag Register #define PIT_TFLG(n) REG_32(0x4003710C + 16 * (n)) -#define TFLG_TIF 0 // Timer Interrupt Flag +enum { + TFLG_TIF = 0, // Timer Interrupt Flag +}; #endif /* MK20DX256_REG_PIT_H */ |