blob: 2851560a98cadf517bc641c52f5b156c35944882 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
|
// Watchdog handler on STM32F4
//
// Copyright (C) 2019 Kevin O'Connor <kevin@koconnor.net>
//
// This file may be distributed under the terms of the GNU GPLv3 license.
#include "internal.h" // IWDG
#include "sched.h" // DECL_TASK
void
watchdog_reset(void)
{
IWDG->KR = 0xAAAA;
}
DECL_TASK(watchdog_reset);
void
watchdog_init(void)
{
IWDG->KR = 0x5555;
IWDG->PR = 0;
IWDG->RLR = 0x0FFF; // 410-512ms timeout (depending on stm32 chip)
IWDG->KR = 0xCCCC;
}
DECL_INIT(watchdog_init);
|
