aboutsummaryrefslogtreecommitdiffstats
path: root/src/stm32/stm32f0_i2c.c
blob: 6096b673c70074f7fbfe0cfc48c8cabbb25406a0 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
// I2C functions on stm32f0
//
// Copyright (C) 2019  Kevin O'Connor <kevin@koconnor.net>
//
// This file may be distributed under the terms of the GNU GPLv3 license.

#include "board/misc.h" // timer_is_before
#include "command.h" // shutdown
#include "gpio.h" // i2c_setup
#include "internal.h" // GPIO
#include "sched.h" // sched_shutdown

struct i2c_info {
    I2C_TypeDef *i2c;
    uint8_t scl_pin, sda_pin, function;
};

#if CONFIG_MACH_STM32F0
DECL_ENUMERATION("i2c_bus", "i2c1_PB6_PB7", 0);
DECL_CONSTANT_STR("BUS_PINS_i2c1_PB6_PB7", "PB6,PB7");
DECL_ENUMERATION("i2c_bus", "i2c1_PF1_PF0", 1);
DECL_CONSTANT_STR("BUS_PINS_i2c1_PF1_PF0", "PF1,PF0");
DECL_ENUMERATION("i2c_bus", "i2c1_PB8_PB9", 2);
DECL_CONSTANT_STR("BUS_PINS_i2c1_PB8_PB9", "PB8,PB9");
// Deprecated "i2c1a" style mappings
DECL_ENUMERATION("i2c_bus", "i2c1", 0);
DECL_CONSTANT_STR("BUS_PINS_i2c1", "PB6,PB7");
DECL_ENUMERATION("i2c_bus", "i2c1a", 1);
DECL_CONSTANT_STR("BUS_PINS_i2c1a", "PF1,PF0");

#elif CONFIG_MACH_STM32G0 || CONFIG_MACH_STM32L4
DECL_ENUMERATION("i2c_bus", "i2c1_PB6_PB7", 0);
DECL_CONSTANT_STR("BUS_PINS_i2c1_PB6_PB7", "PB6,PB7");
DECL_ENUMERATION("i2c_bus", "i2c1_PB8_PB9", 1);
DECL_CONSTANT_STR("BUS_PINS_i2c1_PB8_PB9", "PB8,PB9");
#if CONFIG_MACH_STM32G0
#define GPIO_AF_INDEX 6
DECL_ENUMERATION("i2c_bus", "i2c3_PB3_PB4", 2);
DECL_CONSTANT_STR("BUS_PINS_i2c3_PB3_PB4", "PB3,PB4");
#elif CONFIG_MACH_STM32L4
#define GPIO_AF_INDEX 4
DECL_ENUMERATION("i2c_bus", "i2c3_PA7_PB4", 2);
DECL_CONSTANT_STR("BUS_PINS_i2c3_PA7_PB4", "PA7,PB4");
#endif
DECL_ENUMERATION("i2c_bus", "i2c2_PB10_PB11", 3);
DECL_CONSTANT_STR("BUS_PINS_i2c2_PB10_PB11", "PB10,PB11");
DECL_ENUMERATION("i2c_bus", "i2c2_PB13_PB14", 4);
DECL_CONSTANT_STR("BUS_PINS_i2c2_PB13_PB14", "PB13,PB14");
DECL_ENUMERATION("i2c_bus", "i2c1_PA9_PA10", 5);
DECL_CONSTANT_STR("BUS_PINS_i2c1_PA9_PA10", "PA9,PA10");
#elif CONFIG_MACH_STM32G4
DECL_ENUMERATION("i2c_bus", "i2c1_PA13_PA14", 0);
DECL_CONSTANT_STR("BUS_PINS_i2c1_PA13_PA14", "PA13,PA14");
DECL_ENUMERATION("i2c_bus", "i2c1_PA15_PA14", 1);
DECL_CONSTANT_STR("BUS_PINS_i2c1_PA15_PA14", "PA15,PA14");
DECL_ENUMERATION("i2c_bus", "i2c1_PB8_PB7", 2);
DECL_CONSTANT_STR("BUS_PINS_i2c1_PB8_PB7", "PB8,PB7");
DECL_ENUMERATION("i2c_bus", "i2c1_PB8_PB9", 3);
DECL_CONSTANT_STR("BUS_PINS_i2c1_PB8_PB9", "PB8,PB9");
DECL_ENUMERATION("i2c_bus", "i2c2_PA9_PA8", 4);
DECL_CONSTANT_STR("BUS_PINS_i2c2_PA9_PA8", "PA9,PA8");
DECL_ENUMERATION("i2c_bus", "i2c2_PC4_PF0", 5);
DECL_CONSTANT_STR("BUS_PINS_i2c2_PC4_PF0", "PC4,PF0");
DECL_ENUMERATION("i2c_bus", "i2c3_PC8_PC9", 6);
DECL_CONSTANT_STR("BUS_PINS_i2c3_PC8_PC9", "PC8,PC9");
DECL_ENUMERATION("i2c_bus", "i2c3_PC8_PC11", 7);
DECL_CONSTANT_STR("BUS_PINS_i2c3_PC8_PC11", "PC8,PC11");
#endif

static const struct i2c_info i2c_bus[] = {
#if CONFIG_MACH_STM32F0
    { I2C1, GPIO('B', 6), GPIO('B', 7), GPIO_FUNCTION(1) },
    { I2C1, GPIO('F', 1), GPIO('F', 0), GPIO_FUNCTION(1) },
    { I2C1, GPIO('B', 8), GPIO('B', 9), GPIO_FUNCTION(1) },

#elif CONFIG_MACH_STM32G0 || CONFIG_MACH_STM32L4
    { I2C1, GPIO('B', 6), GPIO('B', 7), GPIO_FUNCTION(GPIO_AF_INDEX) },
    { I2C1, GPIO('B', 8), GPIO('B', 9), GPIO_FUNCTION(GPIO_AF_INDEX) },
#if CONFIG_MACH_STM32G0
    { I2C3, GPIO('B', 3), GPIO('B', 4), GPIO_FUNCTION(GPIO_AF_INDEX) },
#elif CONFIG_MACH_STM32L4
    { I2C3, GPIO('A', 7), GPIO('B', 4), GPIO_FUNCTION(GPIO_AF_INDEX) },
#endif
    { I2C2, GPIO('B', 10), GPIO('B', 11), GPIO_FUNCTION(GPIO_AF_INDEX) },
    { I2C2, GPIO('B', 13), GPIO('B', 14), GPIO_FUNCTION(GPIO_AF_INDEX) },
    { I2C1, GPIO('A', 9), GPIO('A', 10), GPIO_FUNCTION(GPIO_AF_INDEX) },
#elif CONFIG_MACH_STM32G4
    { I2C1, GPIO('A', 13), GPIO('A', 14), GPIO_FUNCTION(4) },
    { I2C1, GPIO('A', 15), GPIO('A', 14), GPIO_FUNCTION(4) },
    { I2C1, GPIO('B', 8), GPIO('B', 7), GPIO_FUNCTION(4) },
    { I2C1, GPIO('B', 8), GPIO('B', 9), GPIO_FUNCTION(4) },
    { I2C2, GPIO('A', 9), GPIO('A', 8), GPIO_FUNCTION(4) },
    { I2C2, GPIO('C', 4), GPIO('F', 0), GPIO_FUNCTION(4) },
    { I2C3, GPIO('C', 8), GPIO('C', 9), GPIO_FUNCTION(8) },
    { I2C3, GPIO('C', 8), GPIO('C', 11), GPIO_FUNCTION(8) },
//    { I2C3, GPIO('A', 8), GPIO('B', 5), GPIO_FUNCTION(4) },
#endif
};

struct i2c_config
i2c_setup(uint32_t bus, uint32_t rate, uint8_t addr)
{
    // Lookup requested i2c bus
    if (bus >= ARRAY_SIZE(i2c_bus))
        shutdown("Unsupported i2c bus");
    const struct i2c_info *ii = &i2c_bus[bus];
    I2C_TypeDef *i2c = ii->i2c;

    if (!is_enabled_pclock((uint32_t)i2c)) {
        // Enable i2c clock and gpio
        enable_pclock((uint32_t)i2c);
        gpio_peripheral(ii->scl_pin, ii->function | GPIO_OPEN_DRAIN, 1);
        gpio_peripheral(ii->sda_pin, ii->function | GPIO_OPEN_DRAIN, 1);

        // Set 100Khz frequency and enable
        i2c->TIMINGR = ((0xB << I2C_TIMINGR_PRESC_Pos)
                        | (0x13 << I2C_TIMINGR_SCLL_Pos)
                        | (0xF << I2C_TIMINGR_SCLH_Pos)
                        | (0x2 << I2C_TIMINGR_SDADEL_Pos)
                        | (0x4 << I2C_TIMINGR_SCLDEL_Pos));
        i2c->CR1 = I2C_CR1_PE;
    }

    return (struct i2c_config){ .i2c=i2c, .addr=addr<<1 };
}

static uint32_t
i2c_wait(I2C_TypeDef *i2c, uint32_t set, uint32_t timeout)
{
    for (;;) {
        uint32_t isr = i2c->ISR;
        if (isr & set)
            return isr;
        if (!timer_is_before(timer_read_time(), timeout))
            shutdown("i2c timeout");
    }
}

void
i2c_write(struct i2c_config config, uint8_t write_len, uint8_t *write)
{
    I2C_TypeDef *i2c = config.i2c;
    uint32_t timeout = timer_read_time() + timer_from_us(5000);

    // Send start and address
    i2c->CR2 = (I2C_CR2_START | config.addr | (write_len << I2C_CR2_NBYTES_Pos)
                | I2C_CR2_AUTOEND);
    while (write_len--) {
        i2c_wait(i2c, I2C_ISR_TXIS, timeout);
        i2c->TXDR = *write++;
    }
    i2c_wait(i2c, I2C_ISR_TXE, timeout);
}

void
i2c_read(struct i2c_config config, uint8_t reg_len, uint8_t *reg
         , uint8_t read_len, uint8_t *read)
{
    I2C_TypeDef *i2c = config.i2c;
    uint32_t timeout = timer_read_time() + timer_from_us(5000);

    // Send start, address, reg
    i2c->CR2 = (I2C_CR2_START | config.addr |
               (reg_len << I2C_CR2_NBYTES_Pos));
    while (reg_len--) {
        i2c_wait(i2c, I2C_ISR_TXIS, timeout);
        i2c->TXDR = *reg++;
    }
    i2c_wait(i2c, I2C_ISR_TC, timeout);

    // send restart, read data
    i2c->CR2 = (I2C_CR2_START | I2C_CR2_RD_WRN | config.addr |
               (read_len << I2C_CR2_NBYTES_Pos) | I2C_CR2_AUTOEND);
    while (read_len--) {
        i2c_wait(i2c, I2C_ISR_RXNE, timeout);
        *read++ = i2c->RXDR;
    }
    i2c_wait(i2c, I2C_ISR_STOPF, timeout);
}