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* pins: Add support for pull down resistorsKevin O'Connor2019-02-275-18/+36
| | | | | | | Add initial support for selecting pull down resistors (for micro-controllers that support it). Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* atsamd: Default to using an external 32Khz crystalKevin O'Connor2019-02-241-2/+2
| | | | | | | Most samd boards have the crystal and it does improve the clock accuracy, so default to enabling it. Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* atsamd: Add support for reference clock selection to SAMD21Kevin O'Connor2019-02-222-27/+58
| | | | | | | | | Add support for using the internal clocks (with USB clock recovery mode if available) on the SAMD21. Don't use the internal clock if the external crystal is requested (instead use the PLL synced to the external 32Khz signal). Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* atsamd: Update SAMD51 clock configurationKevin O'Connor2019-02-222-41/+64
| | | | | | | | | Add support for USB clock recovery mode if an external 32Khz crystal is not in use. If using an external crystal, then don't use the internal 48Mhz DFLL48Mhz clock (just use the PLLs synced to the external 32Khz signal). Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* atsamd: Increase ADC frequency on SAMD51Kevin O'Connor2019-02-221-2/+2
| | | | | | | | The SAMD51 ADC is only clocked on rising edges (vs both rising and falling edges on the SAMD21) and it has a greater minimum frequency than the SAMD21. So, increase the ADC clock. Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* atsamd: Only support 8KiB bootloader on SAMD21Kevin O'Connor2019-02-221-0/+1
| | | | Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* atsamd: Add a GET_FUSE() helper macroKevin O'Connor2019-02-223-26/+19
| | | | | | | Add a helper macro for accessing the non-volatile factory-calibrated "fuse" values. Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* avr: Only prompt for cpu speed and uart port on LOW_LEVEL_OPTIONSKevin O'Connor2019-02-161-3/+3
| | | | | | | The cpu is almost always 16Mhz and the serial port is almost always UART0, so no need to prompt in the normal case. Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* atsamd: Fix samd51 get_clock() sync bit checkKevin O'Connor2019-02-161-1/+1
| | | | Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* atsamd: Fix typo in MakefileKevin O'Connor2019-02-161-1/+1
| | | | Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* atsamd: Do not generate 200M/100M interal clocksKevin O'Connor2019-02-161-51/+2
| | | | | | | | Now that the internal DWT timer is used for software timers, there is no need to clock the peripherals at a higher clock speed. Clock all peripherals at 48Mhz and simplify the clock generation code. Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* atsamd: Don't clear the watchdog if a clear is still in progressKevin O'Connor2019-02-152-2/+4
| | | | | | | | Clearing the watchdog while it is in progress can cause bus stalls on the SAMD21. It appears that clearing the watchdog on the SAMD51 can cause lockups of the watchdog device. Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* atsamd: Move watchdog code to its own filesKevin O'Connor2019-02-154-31/+49
| | | | | | | Move the watchdog code from main.c to watchdog.c and samd51_watchdog.c. Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* atsam: Fix hard pwm cycle divider calculationKevin O'Connor2019-02-131-1/+1
| | | | Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* spi_software: Implementation of software spiKevin O'Connor2019-02-134-5/+128
| | | | | Signed-off-by: Matt Janus <FragginRight@variabl.es> Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* atsam: Add support for hard pwm via PWM controllerKevin O'Connor2019-02-134-3/+106
| | | | Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* atsamd: Fix typo in header guardKevin O'Connor2019-02-131-2/+2
| | | | Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* atsamd: Enable ADC support for samd51 devices (#1204)Florian Heilmann2019-02-083-19/+100
| | | | | | * adc: Enable ADC support for samd51 devices Signed-off-by: Florian Heilmann <Florian.Heilmann@gmx.net>
* atsam: Configure the atsam sram matrix registerKevin O'Connor2019-02-071-0/+11
| | | | | | | | The sram matrix configuration is, bizarrely, configured with a slow default. It will typically add an extra wait state to every memory access. Set the matrix sram controller to improve the performance. Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* debugcmds: Add support for reading/writing 32bit valuesKevin O'Connor2019-02-071-29/+25
| | | | Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* stm32f1: Convert code to use armcm_timerKevin O'Connor2019-02-064-123/+5
| | | | Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* stm32f1: Use internal functions for early USB gpio toggleKevin O'Connor2019-02-063-6/+24
| | | | | | | Avoid using the "low-level" library timing utilities. This is in preparation for using SysTick as part of the timer implementation. Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* lpc176x: Convert code to use armcm_timerKevin O'Connor2019-02-064-67/+6
| | | | Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* atsam: Convert code to use armcm_timerKevin O'Connor2019-02-064-190/+6
| | | | Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* atsamd: Convert SAMD51 to use armcm_timerKevin O'Connor2019-02-063-75/+4
| | | | Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* armcm_timer: Add a generic timer mechanism for ARM CortexM3/M4 chipsKevin O'Connor2019-02-061-0/+136
| | | | | | | | | | | | The ARM CortexM3 (and later) chips almost always have a 32bit timer in the "Debug and Watch Trace" (DWT) unit which resides within the cpu core itself. This timer is generally faster to access than timers located on the chip's peripheral bus. When combined with the standard ARM SysTick timer it provides a (generally) portable mechanism to implement Klipper's software timer mechanism. It's generally also faster than using the vendor specific timers. Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* atsamd: Initial support for SAMD51Kevin O'Connor2019-01-2816-61/+432
| | | | Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* atsamd: Add a get_pclock_frequency() helper functionKevin O'Connor2019-01-285-7/+13
| | | | Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* atsamd: Select the 8K bootloader by defaultKevin O'Connor2019-01-281-2/+2
| | | | Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* atsamd: Pass the power management id to enable_pclock()Kevin O'Connor2019-01-289-32/+33
| | | | | | | Pass the power management id instead of the APBCMASK bit to the enable_pclock() function. Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* atsamd: Clarify clock generation codeKevin O'Connor2019-01-281-30/+35
| | | | | | | Implement gen_clock() and route_pclock() helpers in an effort to make the code more readable. Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* usbserial: Allow USB ids to be specified via KconfigKevin O'Connor2019-01-252-7/+21
| | | | Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* simulator: Fix simulator buildKevin O'Connor2019-01-251-0/+3
| | | | | | Commit b6ccd268 inadvertently broke the simulator build - fix it. Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* avr: Only prompt for CLEAR_PRESCALER and SIMULAVR with LOW_LEVEL_OPTIONSKevin O'Connor2019-01-251-2/+2
| | | | Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* Kconfig: Move SERIAL_BAUD to src/Kconfig and show with LOW_LEVEL_OPTIONSKevin O'Connor2019-01-257-24/+8
| | | | | | | | Move the definition of SERIAL_BAUD to the main src/Kconfig file. Only show this as an option if the user selects the ability to configure low-level options. Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* avr: Rename AVR_SERIAL and AVR_USBSERIAL to SERIAL and USBSERIALKevin O'Connor2019-01-252-8/+8
| | | | | | | Rename the config options to be more consistent with other architectures. Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* atsam: Add support for the SAM3X8C micro-controllerKevin O'Connor2019-01-223-0/+7
| | | | Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* atsam: Add support for USB on SAM3XKevin O'Connor2019-01-195-26/+268
| | | | Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* atsam: Add MACH_SAM3X, MACH_SAM4, MACH_SAM4E, MACH_SAM4S definitionsKevin O'Connor2019-01-188-46/+64
| | | | | | | Add additional Kconfig definitions to make it easier to select the correct code. Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* lpc176x: Implement a median filter on ADC readingsKevin O'Connor2019-01-142-19/+69
| | | | | | | The lpc176x ADC is extremely noisy. Implement a 5 order median filter on each ADC read to weed out obviously incorrect readings. Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* lpc176x: Add mechanism for entering the bootloader from a USB signalKevin O'Connor2019-01-131-0/+9
| | | | Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* adccmds: Run gpio_adc_setup() before oid_alloc()Kevin O'Connor2019-01-131-1/+2
| | | | | | | | Order the adc config code so that a shutdown from gpio_adc_setup() doesn't result in analog_in_shutdown() running on a 'struct analog_in' that hasn't yet been configured. Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* src: Rename source folders for atsam and atsamd architecturesFlorian Heilmann2019-01-1233-74/+80
| | | Signed-off-by: Florian Heilmann <Florian.Heilmann@gmx.net>
* stepper: Fix bug when using a non-zero CONFIG_STEP_DELAY on AVRKevin O'Connor2019-01-111-1/+1
| | | | | | | | Make sure to explicitly cast to 32bit integers when doing math on 16bit integers that require the extra precision as the AVR uses a 16bit int. Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* stepper: Support configuring the stepper pulse length from KconfigKevin O'Connor2019-01-093-15/+41
| | | | | | | Allow the stepper pulse length to be configured at compile time from the Kconfig menu system. Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* i2ccmds: Pass the i2c address as a 7-bit number (0-127)Kevin O'Connor2019-01-074-7/+5
| | | | | | | | | | | | | | | | The sam3 i2c code and the linux code use a 7-bit i2c address, while the avr, lpc176x, and samd21 i2c code uses an 8-bit address with the least significant bit always zero. A similar issue occurred in the host code (sx1509.py and replicape.py use 7-bit addresses while uc1701.py and mcp4451.py use 8-bit addresses). Consistently use 7-bit addresses in all the code. This breaks compatibility between host and mcu software, so make a change to the config_i2c command to force users to synchronize software updates. This also breaks common Smoothieboard configs, so update the mcp4451 code to validate the i2c_address. Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* sam3: Implement board reset via SAM RSTC hardwareKevin O'Connor2019-01-071-1/+6
| | | | | | | Use the RSTC hardware block to perform a full reset on a "reset" command. Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* sam3: Add USB support for the SAM4 "UDP" hardwareKevin O'Connor2019-01-076-2/+256
| | | | Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* sam3: Add support for sam4s8c chipsKevin O'Connor2019-01-0710-8/+222
| | | | Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* sam3: Add additional SPI and USART buses to spi.cKevin O'Connor2019-01-071-0/+4
| | | | Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
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