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path: root/src/stm32/stm32h7_adc.c
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* stm32: Run stm32h723 at 520MhzKevin O'Connor2025-05-021-1/+2
| | | | | | Increase speed of stm32h723 chips from 400Mhz to 520Mhz. Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* stm32: Support over 400Mhz main clock in stm32h7_adc.cKevin O'Connor2025-05-021-6/+7
| | | | Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* stm32: Fix getting wrong ADC value on PA0 of STM32G431 (#6660)Nicholas Huskie2024-08-081-21/+23
| | | | | | | * Fix getting wrong ADC value on PA0 * Fix invalid/unused pin being used as adc channel on STM32H7/G431/L4 Signed-off-by: Nicholas Huskie <huskie@idealfuture.org.cn>
* stm32g4: Fix ADC3 common interface registers name to ADC345_COMMONDropeffect GmbH2024-05-141-0/+4
| | | | | | Use ADC345_COMMON instead of ADC3_COMMON for stm32g4 ADC3 channel. Signed-off-by: Amr Elsayed from Dropeffect GmbH <code@dropeffect.com>
* stm32: Fix ADC for STM32G4Alex Maclean2023-12-211-2/+3
| | | | | | | | At least STM32G4 requires four ADC clock cycles between hardware clearing ADCCAL and setting ADEN or the write disappears. Make a tenacious write attempt. Signed-off-by: Alex Maclean <monkeh@monkeh.net>
* stm32: Increase sample time in stm32h7_adc.cKevin O'Connor2023-01-171-7/+10
| | | | | | | | The existing sample times are not long enough to reliably sample the internal temperature sensor. Longer sample times should also improve results with temperature sensors that have a higher inductance. Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* stm32: Don't set boost nor linear calibration on stm32h723 adc3Kevin O'Connor2023-01-171-14/+14
| | | | | | Only adc1 and adc2 have these CR register bits on stm32h723. Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* stm32: Reduce read-modify-write of CR in stm32h7_adc.c initKevin O'Connor2023-01-171-21/+12
| | | | | | | | | | Prefer explicitly setting the CR hardware register to defined values during initialization. Also, prefer "#if CONFIG_MACH_STM32H7" over bit definitions to make it clear that the code applies only on stm32h7. Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* stm32: Don't use read-modify-write on ISR register in stm32h7_adc.cKevin O'Connor2023-01-171-3/+2
| | | | | | Bits are cleared in the ISR register by writing 1, not by masking. Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* stm32: ADC timing rework and fixes in stm32h7_adc.cKevin O'Connor2023-01-171-34/+23
| | | | | | | | | | | | The stm32l412 doesn't have a PLLSAI1 clock and therefore the CKMODE should not be set to zero. The stm32h7 chips run the adc at 25mhz, so BOOST should be set to 0b10. Improve timing comments. Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* stm32: Move clock line mapping from stm32h7_adc.c to lookup_clock_line()Kevin O'Connor2023-01-171-16/+6
| | | | | | | Use the common lookup_clock_line() code to lookup the adc clock lines. This also enables resets on the adc1/adc2 hardware block. Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* stm32: Simplify setting of adc_common fields in stm32h7_adc.cKevin O'Connor2023-01-171-12/+9
| | | | Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* stm32: Use a consistent bank size of 20 across all chips in stm32h7_adc.cKevin O'Connor2023-01-171-3/+3
| | | | | | | Add a pad entry to adc_pins[] on stm32l4 so that it matches the other chips. Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* stm32: Simplify setting of 12bit mode on stm32h7 in stm32h7_adc.cKevin O'Connor2023-01-171-14/+5
| | | | Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* stm32: No need to use hardware oversampling in stm32h7_adc.cKevin O'Connor2023-01-171-25/+0
| | | | | | | | | Not all chips implement hardware oversampling. The software already implements oversampling, and additional hardware oversampling is unlikely to improve results. Remove the hardware oversampling to simplify the code. Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* stm32: Simplify CFGR register setup in stm32h7_adc.cKevin O'Connor2023-01-171-10/+2
| | | | | | | | On all chips, the JQDIS bit is set and the CONT, RES, ALIGN bits are clear after a reset. There is no need to program the OVRMOD bit. Use the same logic across chips to help unify the adc implementation. Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* stm32: No need for LDORDY check in stm32h7_adc.cKevin O'Connor2023-01-171-17/+4
| | | | | | | | Not all chips have the LDORDY flag, while all chips will stabilize in 10us. There is no need for two different implementations as it is safe to wait 20us on all chips. Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* stm32: Fix stm32l4 buildKevin O'Connor2022-12-151-0/+1
| | | | | | | Commit c5d56f44 neglected to define ADCIN_BANK_SIZE in stm32h7_adc.c on stm32l4. Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* stm32: Apply race fixes to stm32h7_adc.cKevin O'Connor2022-12-121-19/+18
| | | | | | | Improve handling of race conditions with hardware updates. This is the same changes applied to stm32f0_adc.c in commit 88325b6c. Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* stm32: add STM32H723 supportbigtreetech2022-12-021-43/+76
| | | | | Signed-off-by: Chen.BJ from BigTreeTech chenbj@biqu3d.com Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* stm32g4: implement build,usb,can,i2c,spi,serial,adc.Matt Baker2022-12-021-2/+57
| | | | Signed-off-by: Matt Baker <baker.matt.j@gmail.com>
* stm32l4: add stm32l412 support with adc,i2c,spi,usbMatt Baker2022-09-151-19/+85
| | | | Signed-off-by: Matt Baker <baker.matt.j@gmail.com>
* stm32: Fix the STM32H743 mcu temp on SKR 3 (#5711)adelyser2022-08-191-1/+1
| | | Signed-off-by: Aaron DeLyser <bluwolf@gmail.com>
* stm32: Add MCU temp for Stm32h7 (#5606)adelyser2022-06-271-2/+11
| | | | | Added mcu temperature to the stm32h7 processor. Signed-off-by: Aaron DeLyser <bluwolf@gmail.com>
* stm32: Fix ADC on stm32h7 (#5239)adelyser2022-02-061-1/+3
| | | | | | Don't reset the ADC peripheral if the clock is already enabled. Fixes #5236 Signed-off-by: Aaron DeLyser <bluwolf@gmail.com>
* stm32: Add initial support for stm32h7D4SK2021-10-061-0/+234
Signed-off-by: Konstantin Vogel <konstantin.vogel@gmx.net> Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
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