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* stm32g4: implement build,usb,can,i2c,spi,serial,adc.Matt Baker2022-12-021-5/+13
| | | | Signed-off-by: Matt Baker <baker.matt.j@gmail.com>
* stm32l4: add stm32l412 support with adc,i2c,spi,usbMatt Baker2022-09-151-2/+2
| | | | Signed-off-by: Matt Baker <baker.matt.j@gmail.com>
* stm32: Clear SPE flag on a change to SPI CR1 registerKevin O'Connor2022-02-101-0/+6
| | | | | | | | | The stm32 specs indicate that the SPE bit must be cleared before changing the CPHA or CPOL bits. Reported by @cbc02009 and @bigtreetech. Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* stm32: Wait for transmission to complete before returning from spi_transfer()Kevin O'Connor2022-02-101-2/+5
| | | | | | | | | | | | | It's possible for the SCLK pin to still be updating even after the last byte of data has been read from the receive pin. (In particular in spi mode 0 and 1.) Exiting early from spi_transfer() in this case could result in the CS pin being raised before the final updates to SCLK pin. Add an additional wait at the end of spi_transfer() to avoid this issue. Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* stm32: Enable SPI support on stm32g0Kevin O'Connor2021-12-231-3/+7
| | | | | Signed-off-by: Alan.Ma from BigTreeTech <tech@biqu3d.com> Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* stm32: Support spi1 on PB4/PB5/PB3 on stm32f103 and stm32f2Kevin O'Connor2021-05-261-5/+5
| | | | Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* stm32: Add support for spi bus on stm32f407 pins PI2,PI3,PI1Kevin O'Connor2021-02-121-0/+5
| | | | Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* stm32: Minor indention change to spi.cKevin O'Connor2021-02-121-10/+10
| | | | Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* stm32: Add support for spi4 bus on stm32f446 chipKevin O'Connor2021-01-041-0/+7
| | | | Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* stm32: Revert "stm32: performance improvement for spi on stm32f0"Kevin O'Connor2020-03-041-8/+4
| | | | | | | | | | | This reverts commit a2c309a2b02d16ec15fee5702463621239261266. The above commit is causing crashes on the stm32f103xb chip when spi is in use. It's unclear what the cause of the regression is, but the optimization isn't required so revert it until the root cause can be determined. Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* stm32: Don't export spi1a/spi2a on stm32f1Kevin O'Connor2020-01-231-4/+6
| | | | Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* stm32: add alternate pinouts for spi1/2Arne Jansen2020-01-231-3/+9
| | | | | | | In addition to spi3, spi1 and spi2 also have alternate pins. Add them as spi1a and spi2a, similar to spi3. Signed-off-by: Arne Jansen <arne@die-jansens.de>
* stm32: performance improvement for spi on stm32f0Arne Jansen2020-01-231-4/+8
| | | | | | | | | | The stm32 has a small queue for spi tx/rx. The current code only uses the spi with a single byte buffer, effectively waiting for each byte to complete before starting the next transfer. This patch changes the structure of spi_transfer() to make use of the queue and achieve back-to-back transfer of bytes on spi. Signed-off-by: Arne Jansen <arne@die-jansens.de>
* stm32: fix spi_transfer for stm32f0Arne Jansen2020-01-231-2/+8
| | | | | | | | | | The current code accesses the DR as 32 bit. This enabled data packing mode, effectively adding a 00 byte between each sent byte. The receive side had similar problems. To prevent this, all accesses are 8 bit now, even though this is not necessary on stmf[14]. Signed-off-by: Arne Jansen <arne@die-jansens.de>
* stm32: Initial support for stm32f070Kevin O'Connor2019-10-231-2/+4
| | | | Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* stm32: Add support for SPI3 bus on alternate PC11,PC12,PC10 pinsKevin O'Connor2019-09-051-1/+8
| | | | Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* stm32: Add support for SPI1 and SPI3 bussesKevin O'Connor2019-08-311-12/+34
| | | | Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* stm32: Rename stm32f4/ directory to stm32/Kevin O'Connor2019-08-051-0/+59
Now that the code in stm32f4/ can handle both stm32f1 and stm32f4 chips, rename the directory to just "stm32". Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
generated by cgit v1.2.3-70-g09d2 (git 2.50.1) at 2025-09-01 20:14:01 +0000