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-rw-r--r--src/stm32/Kconfig10
-rw-r--r--src/stm32/stm32f1.c9
2 files changed, 17 insertions, 2 deletions
diff --git a/src/stm32/Kconfig b/src/stm32/Kconfig
index 7a1a6d18..dfaa96eb 100644
--- a/src/stm32/Kconfig
+++ b/src/stm32/Kconfig
@@ -155,6 +155,16 @@ config STACK_SIZE
int
default 512
+config STM32F103GD_DISABLE_SWD
+ bool "Disable SWD at startup (for GigaDevice stm32f103 clones)"
+ depends on MACH_STM32F103 && LOW_LEVEL_OPTIONS
+ default n
+ help
+ The GigaDevice clone of the STM32F103 may not be able to
+ reliably disable SWD at run-time. This can prevent the PA13
+ and PA14 pins from being available. Selecting this option
+ disables SWD at startup and thus makes these pins available.
+
######################################################################
# Bootloader
diff --git a/src/stm32/stm32f1.c b/src/stm32/stm32f1.c
index 88500165..77faad72 100644
--- a/src/stm32/stm32f1.c
+++ b/src/stm32/stm32f1.c
@@ -257,8 +257,13 @@ armcm_main(void)
// Disable JTAG to free PA15, PB3, PB4
enable_pclock(AFIO_BASE);
- stm32f1_alternative_remap(AFIO_MAPR_SWJ_CFG_Msk,
- AFIO_MAPR_SWJ_CFG_JTAGDISABLE);
+ if (CONFIG_STM32F103GD_DISABLE_SWD)
+ // GigaDevice clone can't enable PA13/PA14 at runtime - enable here
+ stm32f1_alternative_remap(AFIO_MAPR_SWJ_CFG_Msk,
+ AFIO_MAPR_SWJ_CFG_DISABLE);
+ else
+ stm32f1_alternative_remap(AFIO_MAPR_SWJ_CFG_Msk,
+ AFIO_MAPR_SWJ_CFG_JTAGDISABLE);
sched_main();
}