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-rw-r--r--src/stm32/stm32g4.c3
1 files changed, 3 insertions, 0 deletions
diff --git a/src/stm32/stm32g4.c b/src/stm32/stm32g4.c
index aed9ed8f..139ea8ea 100644
--- a/src/stm32/stm32g4.c
+++ b/src/stm32/stm32g4.c
@@ -105,6 +105,9 @@ enable_clock_stm32g4(void)
enable_pclock(CRS_BASE);
CRS->CR |= CRS_CR_AUTOTRIMEN | CRS_CR_CEN;
}
+
+ // Use PCLK for FDCAN
+ RCC->CCIPR = 2 << RCC_CCIPR_FDCANSEL_Pos;
}
// Main clock setup called at chip startup