1 files changed, 118 insertions, 0 deletions
diff --git a/src/sam3/sam4s_timer.c b/src/sam3/sam4s_timer.c
new file mode 100644
index 00000000..a586dd64
--- /dev/null
+++ b/src/sam3/sam4s_timer.c
@@ -0,0 +1,118 @@
+// SAM4s 16bit timer interrupt scheduling
+//
+// Copyright (C) 2016-2018  Kevin O'Connor <kevin@koconnor.net>
+//
+// This file may be distributed under the terms of the GNU GPLv3 license.
+
+#include "board/io.h" // readl
+#include "board/irq.h" // irq_disable
+#include "board/misc.h" // timer_read_time
+#include "board/timer_irq.h" // timer_dispatch_many
+#include "command.h" // DECL_SHUTDOWN
+#include "internal.h" // TC0
+#include "sched.h" // DECL_INIT
+
+
+/****************************************************************
+ * Low level timer code
+ ****************************************************************/
+
+// Get the 16bit timer value
+static uint32_t
+timer_get(void)
+{
+    return TC0->TC_CHANNEL[0].TC_CV;
+}
+
+// Set the next irq time
+static void
+timer_set(uint32_t value)
+{
+    TC0->TC_CHANNEL[0].TC_RA = value;
+}
+
+// Activate timer dispatch as soon as possible
+void
+timer_kick(void)
+{
+    timer_set(timer_read_time() + 50);
+}
+
+
+/****************************************************************
+ * 16bit hardware timer to 32bit conversion
+ ****************************************************************/
+
+// High bits of timer (top 17 bits)
+static uint32_t timer_high;
+
+// Return the current time (in absolute clock ticks).
+uint32_t __always_inline
+timer_read_time(void)
+{
+    uint32_t th = readl(&timer_high);
+    uint32_t cur = timer_get();
+    // Combine timer_high (high 17 bits) and current time (low 16
+    // bits) using method that handles rollovers correctly.
+    return (th ^ cur) + (th & 0x8000);
+}
+
+// Update timer_high every 0x8000 clock ticks
+static uint_fast8_t
+timer_event(struct timer *t)
+{
+    timer_high += 0x8000;
+    t->waketime = timer_high + 0x8000;
+    return SF_RESCHEDULE;
+}
+static struct timer wrap_timer = {
+    .func = timer_event,
+    .waketime = 0x8000,
+};
+
+void
+timer_reset(void)
+{
+    sched_add_timer(&wrap_timer);
+}
+DECL_SHUTDOWN(timer_reset);
+
+
+/****************************************************************
+ * Timer init
+ ****************************************************************/
+
+void
+timer_init(void)
+{
+    TcChannel *tc = &TC0->TC_CHANNEL[0];
+    // Reset the timer
+    tc->TC_CCR = TC_CCR_CLKDIS;
+    tc->TC_IDR = 0xFFFFFFFF;
+    // Enable it
+    enable_pclock(ID_TC0);
+    tc->TC_CMR = TC_CMR_WAVE | TC_CMR_WAVSEL_UP | TC_CMR_TCCLKS_TIMER_CLOCK2;
+    tc->TC_IER = TC_IER_CPAS;
+    NVIC_SetPriority(TC0_IRQn, 1);
+    NVIC_EnableIRQ(TC0_IRQn);
+    timer_kick();
+    timer_reset();
+    tc->TC_CCR = TC_CCR_CLKEN | TC_CCR_SWTRG;
+}
+DECL_INIT(timer_init);
+
+
+/****************************************************************
+ * Main timer dispatch irq handler
+ ****************************************************************/
+
+// IRQ handler
+void __visible __aligned(16) // aligning helps stabilize perf benchmarks
+TC0_Handler(void)
+{
+    irq_disable();
+    uint32_t next = timer_dispatch_many();
+    timer_set(next);
+    TC0->TC_CHANNEL[0].TC_SR; // read to clear irq pending
+    irq_enable();
+}