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authorKevin O'Connor <kevin@koconnor.net>2022-12-14 09:53:06 -0500
committerKevin O'Connor <kevin@koconnor.net>2023-01-17 18:22:21 -0500
commitd372f913efb84b2303aff9906caeed44d9b37069 (patch)
treef999eabcc827060f6e7fb5875e43e15b8959c530 /src
parent51526fd627d603f209a5ac64f0f533846b4dfec4 (diff)
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stm32: Don't use read-modify-write on ISR register in stm32h7_adc.c
Bits are cleared in the ISR register by writing 1, not by masking. Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
Diffstat (limited to 'src')
-rw-r--r--src/stm32/stm32h7_adc.c5
1 files changed, 2 insertions, 3 deletions
diff --git a/src/stm32/stm32h7_adc.c b/src/stm32/stm32h7_adc.c
index ddec7d88..b9e14916 100644
--- a/src/stm32/stm32h7_adc.c
+++ b/src/stm32/stm32h7_adc.c
@@ -237,11 +237,10 @@ gpio_adc_setup(uint32_t pin)
;
// Enable ADC
- // "Clear the ADRDY bit in the ADC_ISR register by writing ‘1’"
- adc->ISR |= ADC_ISR_ADRDY;
+ adc->ISR = ADC_ISR_ADRDY;
adc->ISR; // Dummy read to make sure write is flushed
adc->CR |= ADC_CR_ADEN;
- while(!(adc->ISR & ADC_ISR_ADRDY))
+ while (!(adc->ISR & ADC_ISR_ADRDY))
;
// Set ADC clock cycles sample time for every channel