stm32: Make sure to enable the gpio clock prior to setting the first value

Signed-off-by: Kevin O'Connor <kevin@koconnor.net>

4 files changed, 22 insertions, 4 deletions

diff --git a/src/stm32/gpio.c b/src/stm32/gpio.c
index 9fbbdaec..8db0b7c4 100644
--- a/src/stm32/gpio.c
+++ b/src/stm32/gpio.c
@@ -52,6 +52,7 @@ gpio_out_setup(uint32_t pin, uint32_t val)
     if (GPIO2PORT(pin) >= ARRAY_SIZE(digital_regs))
         goto fail;
     GPIO_TypeDef *regs = digital_regs[GPIO2PORT(pin)];
+    gpio_clock_enable(regs);
     struct gpio_out g = { .regs=regs, .bit=GPIO2BIT(pin) };
     gpio_out_reset(g, val);
     return g;
diff --git a/src/stm32/internal.h b/src/stm32/internal.h
index 0edfefe5..05a222d0 100644
--- a/src/stm32/internal.h
+++ b/src/stm32/internal.h
@@ -25,6 +25,7 @@ void enable_pclock(uint32_t periph_base);
 int is_enabled_pclock(uint32_t periph_base);
 uint32_t get_pclock_frequency(uint32_t periph_base);
 void clock_setup(void);
+void gpio_clock_enable(GPIO_TypeDef *regs);
 void gpio_peripheral(uint32_t gpio, uint32_t mode, int pullup);
 
 #endif // internal.h
diff --git a/src/stm32/stm32f1.c b/src/stm32/stm32f1.c
index d4a5c853..927ee1db 100644
--- a/src/stm32/stm32f1.c
+++ b/src/stm32/stm32f1.c
@@ -51,6 +51,15 @@ get_pclock_frequency(uint32_t periph_base)
     return FREQ_PERIPH;
 }
 
+// Enable a GPIO peripheral clock
+void
+gpio_clock_enable(GPIO_TypeDef *regs)
+{
+    uint32_t rcc_pos = ((uint32_t)regs - APB2PERIPH_BASE) / 0x400;
+    RCC->APB2ENR |= 1 << rcc_pos;
+    RCC->APB2ENR;
+}
+
 // Set the mode and extended function of a pin
 void
 gpio_peripheral(uint32_t gpio, uint32_t mode, int pullup)
@@ -58,8 +67,7 @@ gpio_peripheral(uint32_t gpio, uint32_t mode, int pullup)
     GPIO_TypeDef *regs = digital_regs[GPIO2PORT(gpio)];
 
     // Enable GPIO clock
-    uint32_t rcc_pos = ((uint32_t)regs - APB2PERIPH_BASE) / 0x400;
-    RCC->APB2ENR |= 1 << rcc_pos;
+    gpio_clock_enable(regs);
 
     // Configure GPIO
     uint32_t pos = gpio % 16, shift = (pos % 8) * 4, msk = 0xf << shift, cfg;
diff --git a/src/stm32/stm32f4.c b/src/stm32/stm32f4.c
index dab8d524..5a09f2d6 100644
--- a/src/stm32/stm32f4.c
+++ b/src/stm32/stm32f4.c
@@ -53,6 +53,15 @@ get_pclock_frequency(uint32_t periph_base)
     return FREQ_PERIPH;
 }
 
+// Enable a GPIO peripheral clock
+void
+gpio_clock_enable(GPIO_TypeDef *regs)
+{
+    uint32_t rcc_pos = ((uint32_t)regs - AHB1PERIPH_BASE) / 0x400;
+    RCC->AHB1ENR |= 1 << rcc_pos;
+    RCC->AHB1ENR;
+}
+
 // Set the mode and extended function of a pin
 void
 gpio_peripheral(uint32_t gpio, uint32_t mode, int pullup)
@@ -60,8 +69,7 @@ gpio_peripheral(uint32_t gpio, uint32_t mode, int pullup)
     GPIO_TypeDef *regs = digital_regs[GPIO2PORT(gpio)];
 
     // Enable GPIO clock
-    uint32_t rcc_pos = ((uint32_t)regs - AHB1PERIPH_BASE) / 0x400;
-    RCC->AHB1ENR |= (1<<rcc_pos);
+    gpio_clock_enable(regs);
 
     // Configure GPIO
     uint32_t mode_bits = mode & 0x0f, func = mode >> 4;