aboutsummaryrefslogtreecommitdiffstats
path: root/src
diff options
context:
space:
mode:
authorKevin O'Connor <kevin@koconnor.net>2019-08-22 08:48:10 -0400
committerKevin O'Connor <kevin@koconnor.net>2019-08-22 09:58:58 -0400
commita44bc950a393644b1af6b2e83bdcfc265a852583 (patch)
tree4206108a19775824342634b5297bad2416c75bb6 /src
parent2a2cf1f536f985330054cf47f47ec7d2455e35fa (diff)
downloadkutter-a44bc950a393644b1af6b2e83bdcfc265a852583.tar.gz
kutter-a44bc950a393644b1af6b2e83bdcfc265a852583.tar.xz
kutter-a44bc950a393644b1af6b2e83bdcfc265a852583.zip
stm32: Move irq handler code above irq setup
Only code movement. Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
Diffstat (limited to 'src')
-rw-r--r--src/stm32/serial.c36
-rw-r--r--src/stm32/usbfs.c56
-rw-r--r--src/stm32/usbotg.c84
3 files changed, 88 insertions, 88 deletions
diff --git a/src/stm32/serial.c b/src/stm32/serial.c
index 0cac8a1b..925d4f8e 100644
--- a/src/stm32/serial.c
+++ b/src/stm32/serial.c
@@ -44,24 +44,6 @@ DECL_CONSTANT_STR("RESERVE_PINS_serial", "PB11,PB10");
#define CR1_FLAGS (USART_CR1_UE | USART_CR1_RE | USART_CR1_TE \
| USART_CR1_RXNEIE)
-void
-serial_init(void)
-{
- enable_pclock((uint32_t)USARTx);
-
- uint32_t pclk = get_pclock_frequency((uint32_t)USARTx);
- uint32_t div = DIV_ROUND_CLOSEST(pclk, CONFIG_SERIAL_BAUD);
- USARTx->BRR = (((div / 16) << USART_BRR_DIV_Mantissa_Pos)
- | ((div % 16) << USART_BRR_DIV_Fraction_Pos));
- USARTx->CR1 = CR1_FLAGS;
- NVIC_SetPriority(USARTx_IRQn, 0);
- NVIC_EnableIRQ(USARTx_IRQn);
-
- gpio_peripheral(GPIO_Rx, GPIO_FUNCTION(7), 1);
- gpio_peripheral(GPIO_Tx, GPIO_FUNCTION(7), 0);
-}
-DECL_INIT(serial_init);
-
void __visible
USARTx_IRQHandler(void)
{
@@ -83,3 +65,21 @@ serial_enable_tx_irq(void)
{
USARTx->CR1 = CR1_FLAGS | USART_CR1_TXEIE;
}
+
+void
+serial_init(void)
+{
+ enable_pclock((uint32_t)USARTx);
+
+ uint32_t pclk = get_pclock_frequency((uint32_t)USARTx);
+ uint32_t div = DIV_ROUND_CLOSEST(pclk, CONFIG_SERIAL_BAUD);
+ USARTx->BRR = (((div / 16) << USART_BRR_DIV_Mantissa_Pos)
+ | ((div % 16) << USART_BRR_DIV_Fraction_Pos));
+ USARTx->CR1 = CR1_FLAGS;
+ NVIC_SetPriority(USARTx_IRQn, 0);
+ NVIC_EnableIRQ(USARTx_IRQn);
+
+ gpio_peripheral(GPIO_Rx, GPIO_FUNCTION(7), 1);
+ gpio_peripheral(GPIO_Tx, GPIO_FUNCTION(7), 0);
+}
+DECL_INIT(serial_init);
diff --git a/src/stm32/usbfs.c b/src/stm32/usbfs.c
index 929ec01b..a2706d31 100644
--- a/src/stm32/usbfs.c
+++ b/src/stm32/usbfs.c
@@ -233,34 +233,6 @@ usb_request_bootloader(void)
* Setup and interrupts
****************************************************************/
-DECL_CONSTANT_STR("RESERVE_PINS_USB", "PA11,PA12");
-
-// Initialize the usb controller
-void
-usb_init(void)
-{
- // Pull the D+ pin low briefly to signal a new connection
- gpio_out_setup(GPIO('A', 12), 0);
- udelay(5000);
- gpio_in_setup(GPIO('A', 12), 0);
-
- // Setup USB packet memory
- btable_configure();
-
- // Enable USB clock
- enable_pclock(USB_BASE);
-
- // Reset usb controller and enable interrupts
- USB->CNTR = USB_CNTR_FRES;
- USB->BTABLE = 0;
- USB->DADDR = 0;
- USB->CNTR = USB_CNTR_RESETM;
- USB->ISTR = 0;
- NVIC_SetPriority(USB_LP_CAN1_RX0_IRQn, 1);
- NVIC_EnableIRQ(USB_LP_CAN1_RX0_IRQn);
-}
-DECL_INIT(usb_init);
-
// Configure interface after a USB reset event
static void
usb_reset(void)
@@ -305,3 +277,31 @@ USB_LP_CAN1_RX0_IRQHandler(void)
usb_reset();
}
}
+
+DECL_CONSTANT_STR("RESERVE_PINS_USB", "PA11,PA12");
+
+// Initialize the usb controller
+void
+usb_init(void)
+{
+ // Pull the D+ pin low briefly to signal a new connection
+ gpio_out_setup(GPIO('A', 12), 0);
+ udelay(5000);
+ gpio_in_setup(GPIO('A', 12), 0);
+
+ // Setup USB packet memory
+ btable_configure();
+
+ // Enable USB clock
+ enable_pclock(USB_BASE);
+
+ // Reset usb controller and enable interrupts
+ USB->CNTR = USB_CNTR_FRES;
+ USB->BTABLE = 0;
+ USB->DADDR = 0;
+ USB->CNTR = USB_CNTR_RESETM;
+ USB->ISTR = 0;
+ NVIC_SetPriority(USB_LP_CAN1_RX0_IRQn, 1);
+ NVIC_EnableIRQ(USB_LP_CAN1_RX0_IRQn);
+}
+DECL_INIT(usb_init);
diff --git a/src/stm32/usbotg.c b/src/stm32/usbotg.c
index b47643c3..95adfd36 100644
--- a/src/stm32/usbotg.c
+++ b/src/stm32/usbotg.c
@@ -264,48 +264,6 @@ usb_request_bootloader(void)
* Setup and interrupts
****************************************************************/
-DECL_CONSTANT_STR("RESERVE_PINS_USB", "PA11,PA12");
-
-// Initialize the usb controller
-void
-usb_init(void)
-{
- // Enable USB clock
- RCC->AHB2ENR |= RCC_AHB2ENR_OTGFSEN;
- while (!(OTG->GRSTCTL & USB_OTG_GRSTCTL_AHBIDL))
- ;
-
- // Configure USB in full-speed device mode
- OTG->GUSBCFG = (USB_OTG_GUSBCFG_FDMOD | USB_OTG_GUSBCFG_PHYSEL
- | (6 << USB_OTG_GUSBCFG_TRDT_Pos));
- OTGD->DCFG |= (3 << USB_OTG_DCFG_DSPD_Pos);
-#if CONFIG_MACH_STM32F446
- OTG->GOTGCTL = USB_OTG_GOTGCTL_BVALOEN | USB_OTG_GOTGCTL_BVALOVAL;
-#else
- OTG->GCCFG |= USB_OTG_GCCFG_NOVBUSSENS;
-#endif
-
- // Route pins
- gpio_peripheral(GPIO('A', 11), GPIO_FUNCTION(10), 0);
- gpio_peripheral(GPIO('A', 12), GPIO_FUNCTION(10), 0);
-
- // Setup USB packet memory
- fifo_configure();
-
- // Enable interrupts
- OTGD->DAINTMSK = (1 << 0) | (1 << USB_CDC_EP_BULK_IN);
- OTG->GINTMSK = (USB_OTG_GINTMSK_USBRST | USB_OTG_GINTSTS_USBSUSP
- | USB_OTG_GINTMSK_RXFLVLM | USB_OTG_GINTMSK_IEPINT);
- OTG->GAHBCFG = USB_OTG_GAHBCFG_GINT;
- NVIC_SetPriority(OTG_FS_IRQn, 1);
- NVIC_EnableIRQ(OTG_FS_IRQn);
-
- // Enable USB
- OTG->GCCFG |= USB_OTG_GCCFG_PWRDWN;
- OTGD->DCTL = 0;
-}
-DECL_INIT(usb_init);
-
// Configure interface after a USB reset event
static void
usb_reset(void)
@@ -396,3 +354,45 @@ OTG_FS_IRQHandler(void)
usb_notify_bulk_in();
}
}
+
+DECL_CONSTANT_STR("RESERVE_PINS_USB", "PA11,PA12");
+
+// Initialize the usb controller
+void
+usb_init(void)
+{
+ // Enable USB clock
+ RCC->AHB2ENR |= RCC_AHB2ENR_OTGFSEN;
+ while (!(OTG->GRSTCTL & USB_OTG_GRSTCTL_AHBIDL))
+ ;
+
+ // Configure USB in full-speed device mode
+ OTG->GUSBCFG = (USB_OTG_GUSBCFG_FDMOD | USB_OTG_GUSBCFG_PHYSEL
+ | (6 << USB_OTG_GUSBCFG_TRDT_Pos));
+ OTGD->DCFG |= (3 << USB_OTG_DCFG_DSPD_Pos);
+#if CONFIG_MACH_STM32F446
+ OTG->GOTGCTL = USB_OTG_GOTGCTL_BVALOEN | USB_OTG_GOTGCTL_BVALOVAL;
+#else
+ OTG->GCCFG |= USB_OTG_GCCFG_NOVBUSSENS;
+#endif
+
+ // Route pins
+ gpio_peripheral(GPIO('A', 11), GPIO_FUNCTION(10), 0);
+ gpio_peripheral(GPIO('A', 12), GPIO_FUNCTION(10), 0);
+
+ // Setup USB packet memory
+ fifo_configure();
+
+ // Enable interrupts
+ OTGD->DAINTMSK = (1 << 0) | (1 << USB_CDC_EP_BULK_IN);
+ OTG->GINTMSK = (USB_OTG_GINTMSK_USBRST | USB_OTG_GINTSTS_USBSUSP
+ | USB_OTG_GINTMSK_RXFLVLM | USB_OTG_GINTMSK_IEPINT);
+ OTG->GAHBCFG = USB_OTG_GAHBCFG_GINT;
+ NVIC_SetPriority(OTG_FS_IRQn, 1);
+ NVIC_EnableIRQ(OTG_FS_IRQn);
+
+ // Enable USB
+ OTG->GCCFG |= USB_OTG_GCCFG_PWRDWN;
+ OTGD->DCTL = 0;
+}
+DECL_INIT(usb_init);