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authorKevin O'Connor <kevin@koconnor.net>2019-04-01 00:11:23 -0400
committerKevin O'Connor <kevin@koconnor.net>2019-04-04 18:29:31 -0400
commit3e71a57f67ce0dde62e942dfa33bf38d64262916 (patch)
treef4b128d810d8678d41b71c6a02aa23875c2c9ea7 /src
parentbc9fd03dabc38ae55fae3151e94cffe7157b95bd (diff)
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lpc176x: Use enumerations for buses and reserve pins
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
Diffstat (limited to 'src')
-rw-r--r--src/lpc176x/i2c.c5
-rw-r--r--src/lpc176x/serial.c5
-rw-r--r--src/lpc176x/spi.c7
-rw-r--r--src/lpc176x/usbserial.c8
4 files changed, 18 insertions, 7 deletions
diff --git a/src/lpc176x/i2c.c b/src/lpc176x/i2c.c
index 420bef95..7b87083f 100644
--- a/src/lpc176x/i2c.c
+++ b/src/lpc176x/i2c.c
@@ -11,6 +11,9 @@
#include "internal.h" // gpio_peripheral
#include "sched.h" // sched_shutdown
+DECL_ENUMERATION("i2c_bus", "i2c1", 0);
+DECL_CONSTANT_STR("BUS_PINS_i2c1", "P0.1,P0.0");
+
// i2c connection status flags
enum {
IF_START = 1<<5, IF_STOP = 1<<4, IF_IRQ = 1<<3, IF_ACK = 1<<2, IF_ENA = 1<<6
@@ -25,8 +28,8 @@ i2c_init(void)
have_run_init = 1;
// Init i2c bus 1 pins
- gpio_peripheral(GPIO(0, 0), 3, 0);
gpio_peripheral(GPIO(0, 1), 3, 0);
+ gpio_peripheral(GPIO(0, 0), 3, 0);
// Set 100Khz frequency
enable_pclock(PCLK_I2C1);
diff --git a/src/lpc176x/serial.c b/src/lpc176x/serial.c
index f53b1a81..0e0c6aaf 100644
--- a/src/lpc176x/serial.c
+++ b/src/lpc176x/serial.c
@@ -8,9 +8,12 @@
#include "autoconf.h" // CONFIG_SERIAL_BAUD
#include "board/irq.h" // irq_save
#include "board/serial_irq.h" // serial_rx_data
+#include "command.h" // DECL_CONSTANT_STR
#include "internal.h" // gpio_peripheral
#include "sched.h" // DECL_INIT
+DECL_CONSTANT_STR("RESERVE_PINS_serial", "P0.3,P0.2");
+
void
serial_init(void)
{
@@ -27,8 +30,8 @@ serial_init(void)
LPC_UART0->FCR = 0x01;
// Setup pins
- gpio_peripheral(GPIO(0, 2), 1, 0);
gpio_peripheral(GPIO(0, 3), 1, 0);
+ gpio_peripheral(GPIO(0, 2), 1, 0);
// Enable receive irq
NVIC_SetPriority(UART0_IRQn, 0);
diff --git a/src/lpc176x/spi.c b/src/lpc176x/spi.c
index e959877c..bfdb8fe8 100644
--- a/src/lpc176x/spi.c
+++ b/src/lpc176x/spi.c
@@ -10,6 +10,9 @@
#include "internal.h" // gpio_peripheral
#include "sched.h" // sched_shutdown
+DECL_ENUMERATION("spi_bus", "ssp0", 0);
+DECL_CONSTANT_STR("BUS_PINS_ssp0", "P0.17,P0.18,P0.15");
+
static void
spi_init(void)
{
@@ -18,10 +21,10 @@ spi_init(void)
return;
have_run_init = 1;
- // Configure SCK0, MISO0, MOSI0 pins
- gpio_peripheral(GPIO(0, 15), 2, 0);
+ // Configure MISO0, MOSI0, SCK0 pins
gpio_peripheral(GPIO(0, 17), 2, 0);
gpio_peripheral(GPIO(0, 18), 2, 0);
+ gpio_peripheral(GPIO(0, 15), 2, 0);
// Setup clock
enable_pclock(PCLK_SSP0);
diff --git a/src/lpc176x/usbserial.c b/src/lpc176x/usbserial.c
index 847746d8..18466da7 100644
--- a/src/lpc176x/usbserial.c
+++ b/src/lpc176x/usbserial.c
@@ -10,7 +10,7 @@
#include "board/irq.h" // irq_disable
#include "board/misc.h" // timer_read_time
#include "byteorder.h" // cpu_to_le32
-#include "command.h" // output
+#include "command.h" // DECL_CONSTANT_STR
#include "generic/usb_cdc.h" // usb_notify_ep0
#include "internal.h" // gpio_peripheral
#include "sched.h" // DECL_INIT
@@ -261,6 +261,8 @@ usb_request_bootloader(void)
NVIC_SystemReset();
}
+DECL_CONSTANT_STR("RESERVE_PINS_USB", "P0.30,P0.29,P2.9");
+
void
usbserial_init(void)
{
@@ -271,9 +273,9 @@ usbserial_init(void)
LPC_USB->USBClkCtrl = 0x12;
while (LPC_USB->USBClkSt != 0x12)
;
- // configure USBD+, USBD-, and USB Connect pins
- gpio_peripheral(GPIO(0, 29), 1, 0);
+ // configure USBD-, USBD+, and USB Connect pins
gpio_peripheral(GPIO(0, 30), 1, 0);
+ gpio_peripheral(GPIO(0, 29), 1, 0);
gpio_peripheral(GPIO(2, 9), 1, 0);
// setup endpoints
realize_endpoint(EP0OUT, USB_CDC_EP0_SIZE);