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| author | Kevin O'Connor <kevin@koconnor.net> | 2019-07-28 11:53:28 -0400 |
|---|---|---|
| committer | Kevin O'Connor <kevin@koconnor.net> | 2019-07-28 22:55:48 -0400 |
| commit | 9bc3a29ee4ce2816c00564c7f432a9bef94fbee2 (patch) | |
| tree | 4a65240a2f4a18ab30d973fa8ae0e931559120ec /src/stm32f4/gpio.c | |
| parent | bc9c8cd7a052c03301995edafde62385ec7fb8a8 (diff) | |
| download | kutter-9bc3a29ee4ce2816c00564c7f432a9bef94fbee2.tar.gz kutter-9bc3a29ee4ce2816c00564c7f432a9bef94fbee2.tar.xz kutter-9bc3a29ee4ce2816c00564c7f432a9bef94fbee2.zip | |
stm32f4: Add support for full range of GPIO pins
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
Diffstat (limited to 'src/stm32f4/gpio.c')
| -rw-r--r-- | src/stm32f4/gpio.c | 37 |
1 files changed, 13 insertions, 24 deletions
diff --git a/src/stm32f4/gpio.c b/src/stm32f4/gpio.c index 707eaf18..77a00c0f 100644 --- a/src/stm32f4/gpio.c +++ b/src/stm32f4/gpio.c @@ -14,28 +14,22 @@ DECL_ENUMERATION_RANGE("pin", "PA0", GPIO('A', 0), 32); DECL_ENUMERATION_RANGE("pin", "PB0", GPIO('B', 0), 32); DECL_ENUMERATION_RANGE("pin", "PC0", GPIO('C', 0), 32); +DECL_ENUMERATION_RANGE("pin", "PD0", GPIO('D', 0), 32); +DECL_ENUMERATION_RANGE("pin", "PE0", GPIO('E', 0), 32); +DECL_ENUMERATION_RANGE("pin", "PF0", GPIO('F', 0), 32); +DECL_ENUMERATION_RANGE("pin", "PG0", GPIO('G', 0), 32); +DECL_ENUMERATION_RANGE("pin", "PH0", GPIO('H', 0), 32); +#ifdef GPIOI +DECL_ENUMERATION_RANGE("pin", "PI0", GPIO('I', 0), 32); +#endif -static GPIO_TypeDef * const digital_regs[] = { - GPIOA, GPIOB, GPIOC +GPIO_TypeDef * const digital_regs[] = { + GPIOA, GPIOB, GPIOC, GPIOD, GPIOE, GPIOF, GPIOG, GPIOH, +#ifdef GPIOI + GPIOI, +#endif }; -// Set the mode and extended function of a pin -void -gpio_peripheral(uint32_t gpio, uint32_t mode, int pullup) -{ - GPIO_TypeDef *regs = digital_regs[GPIO2PORT(gpio)]; - uint32_t mode_bits = mode & 0x0f, func = mode >> 4; - uint32_t pup = pullup ? (pullup > 0 ? 1 : 2) : 0; - uint32_t pos = gpio % 16, af_reg = pos / 8; - uint32_t af_shift = (pos % 8) * 4, af_msk = 0x0f << af_shift; - uint32_t m_shift = pos * 2, m_msk = 0x03 << m_shift; - - regs->AFR[af_reg] = (regs->AFR[af_reg] & ~af_msk) | (func << af_shift); - regs->MODER = (regs->MODER & ~m_msk) | (mode_bits << m_shift); - regs->PUPDR = (regs->PUPDR & ~m_msk) | (pup << m_shift); - regs->OSPEEDR = (regs->OSPEEDR & ~m_msk) | (0x02 << m_shift); -} - // Convert a register and bit location back to an integer pin identifier static int regs_to_pin(GPIO_TypeDef *regs, uint32_t bit) @@ -47,11 +41,6 @@ regs_to_pin(GPIO_TypeDef *regs, uint32_t bit) return 0; } - -/**************************************************************** - * General Purpose Input Output (GPIO) pins - ****************************************************************/ - struct gpio_out gpio_out_setup(uint32_t pin, uint32_t val) { |