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authorGrigori Goronzy <greg@chown.ath.cx>2018-07-02 23:17:28 +0200
committerKevinOConnor <kevin@koconnor.net>2018-07-07 11:05:33 -0400
commit5c7c8c984b582304d1f1c36de0f1d9bacbd8d42d (patch)
tree780781bf7d848453eabf4b8364addfb04478df88 /src/stm32f1/main.c
parentb0ee323e2e01ba2084bea8de733f16474f1167eb (diff)
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stm32f1: add SPI support
Add basic SPI support and associated documentation. v2: remove baud rate check, fix baud rate calculations v3: finish transaction with BSY check, disable SPI when not in use Signed-off-by: Grigori Goronzy <greg@chown.ath.cx>
Diffstat (limited to 'src/stm32f1/main.c')
-rw-r--r--src/stm32f1/main.c9
1 files changed, 9 insertions, 0 deletions
diff --git a/src/stm32f1/main.c b/src/stm32f1/main.c
index 8c144343..c6839c36 100644
--- a/src/stm32f1/main.c
+++ b/src/stm32f1/main.c
@@ -14,6 +14,7 @@
#include "stm32f1xx_ll_iwdg.h"
#include "stm32f1xx_ll_gpio.h"
#include "stm32f1xx_ll_adc.h"
+#include "stm32f1xx_ll_spi.h"
#include "sched.h" // sched_main
DECL_CONSTANT(MCU, "stm32f103");
@@ -108,6 +109,13 @@ void adc_config(void)
LL_ADC_REG_SetSequencerLength(ADC1, LL_ADC_REG_SEQ_SCAN_DISABLE);
}
+void spi_config(void)
+{
+ LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_SPI2);
+ LL_SPI_SetNSSMode(SPI2, LL_SPI_NSS_SOFT);
+ LL_SPI_SetMode(SPI2, LL_SPI_MODE_MASTER);
+}
+
void io_config(void)
{
LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_AFIO);
@@ -131,6 +139,7 @@ main(void)
clock_config();
adc_config();
io_config();
+ spi_config();
sched_main();
return 0;
}