stm32g0: add stm32g0b0 support

Signed-off-by: Alex Voinea <voinea.dragos.alexandru@gmail.com>

4 files changed, 32 insertions, 15 deletions

diff --git a/src/stm32/Kconfig b/src/stm32/Kconfig
index 83bf6449..504453a8 100644
--- a/src/stm32/Kconfig
+++ b/src/stm32/Kconfig
@@ -65,9 +65,14 @@ choice
         bool "STM32F072"
         select MACH_STM32F0
         select MACH_STM32F0x2
+    config MACH_STM32G0B0
+        bool "STM32G0B0"
+        select MACH_STM32G0
+        select MACH_STM32G0Bx
     config MACH_STM32G0B1
         bool "STM32G0B1"
         select MACH_STM32G0
+        select MACH_STM32G0Bx
     config MACH_STM32G431
         bool "STM32G431"
         select MACH_STM32G4
@@ -99,6 +104,8 @@ config MACH_STM32F4
     bool
 config MACH_STM32G0
     bool
+config MACH_STM32G0Bx
+    bool
 config MACH_STM32G4
     bool
 config MACH_STM32H7
@@ -111,7 +118,7 @@ config MACH_STM32L4
     bool
 config HAVE_STM32_USBFS
     bool
-    default y if MACH_STM32F0x2 || MACH_STM32G0 || MACH_STM32L4 || MACH_STM32G4
+    default y if MACH_STM32F0x2 || MACH_STM32GBx || MACH_STM32L4 || MACH_STM32G4
     default y if (MACH_STM32F103 || MACH_STM32F070) && !STM32_CLOCK_REF_INTERNAL
 config HAVE_STM32_USBOTG
     bool
@@ -121,7 +128,7 @@ config HAVE_STM32_CANBUS
     default y if MACH_STM32F1 || MACH_STM32F2 || MACH_STM32F4x5 || MACH_STM32F446 || MACH_STM32F0x2
 config HAVE_STM32_FDCANBUS
     bool
-    default y if MACH_STM32G0 || MACH_STM32H7 || MACH_STM32G4
+    default y if MACH_STM32G0B1 || MACH_STM32H7 || MACH_STM32G4
 config HAVE_STM32_USBCANBUS
     bool
     depends on HAVE_STM32_USBFS || HAVE_STM32_USBOTG
@@ -142,6 +149,7 @@ config MCU
     default "stm32f407xx" if MACH_STM32F407
     default "stm32f429xx" if MACH_STM32F429
     default "stm32f446xx" if MACH_STM32F446
+    default "stm32g0b0xx" if MACH_STM32G0B0
     default "stm32g0b1xx" if MACH_STM32G0B1
     default "stm32g431xx" if MACH_STM32G431
     default "stm32h723xx" if MACH_STM32H723
@@ -171,7 +179,7 @@ config FLASH_SIZE
     default 0x10000 if MACH_STM32F103 || MACH_STM32L412 # Flash size of stm32f103x8 (64KiB)
     default 0x40000 if MACH_STM32F2 || MACH_STM32F401 || MACH_STM32H723
     default 0x80000 if MACH_STM32F4x5 || MACH_STM32F446
-    default 0x20000 if MACH_STM32G0B1 || MACH_STM32G431
+    default 0x20000 if MACH_STM32G0 || MACH_STM32G431
     default 0x20000 if MACH_STM32H750
     default 0x200000 if MACH_STM32H743
 
@@ -195,7 +203,7 @@ config RAM_SIZE
     default 0x20000 if MACH_STM32F207
     default 0x10000 if MACH_STM32F401
     default 0x20000 if MACH_STM32F4x5 || MACH_STM32F446
-    default 0x24000 if MACH_STM32G0B1
+    default 0x24000 if MACH_STM32G0Bx
     default 0x20000 if MACH_STM32H7
 
 config STACK_SIZE
diff --git a/src/stm32/stm32f0_serial.c b/src/stm32/stm32f0_serial.c
index bb4ec69a..4e0f39fe 100644
--- a/src/stm32/stm32f0_serial.c
+++ b/src/stm32/stm32f0_serial.c
@@ -87,8 +87,10 @@
 #endif
 
 #if CONFIG_MACH_STM32G0
-  // The stm32g0 has slightly different register names
-  #define USART2_IRQn USART2_LPUART2_IRQn
+  // Some of the stm32g0 MCUs have slightly different register names
+  #ifdef LPUART2
+    #define USART2_IRQn USART2_LPUART2_IRQn
+  #endif
   #define USART_CR1_RXNEIE USART_CR1_RXNEIE_RXFNEIE
   #define USART_CR1_TXEIE USART_CR1_TXEIE_TXFNFIE
   #define USART_ISR_RXNE USART_ISR_RXNE_RXFNE
diff --git a/src/stm32/stm32f0_timer.c b/src/stm32/stm32f0_timer.c
index 4f5e6d38..0d8ed3a3 100644
--- a/src/stm32/stm32f0_timer.c
+++ b/src/stm32/stm32f0_timer.c
@@ -20,14 +20,17 @@
  ****************************************************************/
 
 // Use 32bit TIM2 timer if available (otherwise use 16bit TIM3 timer)
-#ifdef TIM2
-#define TIMx TIM2
-#define TIMx_IRQn TIM2_IRQn
-#define HAVE_TIMER_32BIT 1
-#else
-#define TIMx TIM3
-#define TIMx_IRQn TIM3_IRQn
-#define HAVE_TIMER_32BIT 0
+#if defined(TIM2)
+  #define TIMx TIM2
+  #define TIMx_IRQn TIM2_IRQn
+  #define HAVE_TIMER_32BIT 1
+#elif defined(TIM3)
+  #define TIMx TIM3
+  #define TIMx_IRQn TIM3_IRQn
+  #define HAVE_TIMER_32BIT 0
+  #ifdef TIM4
+    #define TIM3_IRQn TIM3_TIM4_IRQn
+  #endif
 #endif
 
 static inline uint32_t
diff --git a/src/stm32/stm32g0.c b/src/stm32/stm32g0.c
index 244e00d9..84711709 100644
--- a/src/stm32/stm32g0.c
+++ b/src/stm32/stm32g0.c
@@ -32,12 +32,16 @@ lookup_clock_line(uint32_t periph_base)
         uint32_t bit = 1 << ((periph_base - AHBPERIPH_BASE) / 0x400);
         return (struct cline){.en=&RCC->AHBENR, .rst=&RCC->AHBRSTR, .bit=bit};
     }
+#if defined(FDCAN1_BASE) || defined(FDCAN2_BASE)
     if ((periph_base == FDCAN1_BASE) || (periph_base == FDCAN2_BASE))
         return (struct cline){.en=&RCC->APBENR1,.rst=&RCC->APBRSTR1,.bit=1<<12};
+#endif
     if (periph_base == USB_BASE)
         return (struct cline){.en=&RCC->APBENR1,.rst=&RCC->APBRSTR1,.bit=1<<13};
+#ifdef CRS_BASE
     if (periph_base == CRS_BASE)
         return (struct cline){.en=&RCC->APBENR1,.rst=&RCC->APBRSTR1,.bit=1<<16};
+#endif
     if (periph_base == I2C3_BASE)
         return (struct cline){.en=&RCC->APBENR1,.rst=&RCC->APBRSTR1,.bit=1<<23};
     if (periph_base == TIM1_BASE)
@@ -56,7 +60,7 @@ lookup_clock_line(uint32_t periph_base)
         return (struct cline){.en=&RCC->APBENR2,.rst=&RCC->APBRSTR2,.bit=1<<18};
     if (periph_base == ADC1_BASE)
         return (struct cline){.en=&RCC->APBENR2,.rst=&RCC->APBRSTR2,.bit=1<<20};
-    if (periph_base >= APBPERIPH_BASE && periph_base <= LPTIM1_BASE)
+    if (periph_base >= APBPERIPH_BASE && periph_base < APBPERIPH_BASE + 0x8000)
     {
         uint32_t bit = 1 << ((periph_base - APBPERIPH_BASE) / 0x400);
         return (struct cline){.en=&RCC->APBENR1, .rst=&RCC->APBRSTR1, .bit=bit};