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authorArksine <9563098+Arksine@users.noreply.github.com>2021-04-03 06:54:07 -0400
committerKevinOConnor <kevin@koconnor.net>2021-04-07 12:57:21 -0400
commit689c2f9baf835b55cdbb68d78b0913d8ca6df317 (patch)
tree18d3322e3c2dead7f297b1d1ea0e3594af8c0f06 /src/stm32
parent5729109727b508f13f71b6eb41955a252d9a9e39 (diff)
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stm32f1: reset peripherals in enable_pcclock()
Some bootloaders do not disable peripherals in use before jumping to the application. Reset peripherals to assure correct operation. SIgned-off-by: Eric Callahan <arksine.code@gmail.com>
Diffstat (limited to 'src/stm32')
-rw-r--r--src/stm32/stm32f1.c4
1 files changed, 4 insertions, 0 deletions
diff --git a/src/stm32/stm32f1.c b/src/stm32/stm32f1.c
index ae8fcd67..34c28573 100644
--- a/src/stm32/stm32f1.c
+++ b/src/stm32/stm32f1.c
@@ -21,10 +21,14 @@ enable_pclock(uint32_t periph_base)
uint32_t pos = (periph_base - APB1PERIPH_BASE) / 0x400;
RCC->APB1ENR |= (1<<pos);
RCC->APB1ENR;
+ RCC->APB1RSTR |= (1<<pos);
+ RCC->APB1RSTR &= ~(1<<pos);
} else if (periph_base < AHBPERIPH_BASE) {
uint32_t pos = (periph_base - APB2PERIPH_BASE) / 0x400;
RCC->APB2ENR |= (1<<pos);
RCC->APB2ENR;
+ RCC->APB2RSTR |= (1<<pos);
+ RCC->APB2RSTR &= ~(1<<pos);
} else {
uint32_t pos = (periph_base - AHBPERIPH_BASE) / 0x400;
RCC->AHBENR |= (1<<pos);