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authorKevin O'Connor <kevin@koconnor.net>2019-09-16 11:45:36 -0400
committerKevin O'Connor <kevin@koconnor.net>2019-10-23 21:19:03 -0400
commit2c535106ee5bbbcc019cb0820d1a5fcf0639eb9e (patch)
treea3a3cbf9f03ab5ed0b2d63600ed205561796ee27 /src/stm32/usbfs.c
parent7e090a996a85016b2e72fa5d426ba95fe8bdc703 (diff)
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stm32: Initial support for stm32f070
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
Diffstat (limited to 'src/stm32/usbfs.c')
-rw-r--r--src/stm32/usbfs.c23
1 files changed, 17 insertions, 6 deletions
diff --git a/src/stm32/usbfs.c b/src/stm32/usbfs.c
index b9152e62..aadc4027 100644
--- a/src/stm32/usbfs.c
+++ b/src/stm32/usbfs.c
@@ -235,7 +235,7 @@ usb_reset(void)
// Main irq handler
void
-USB_LP_CAN1_RX0_IRQHandler(void)
+USB_IRQHandler(void)
{
uint32_t istr = USB->ISTR;
if (istr & USB_ISTR_CTR) {
@@ -269,10 +269,12 @@ DECL_CONSTANT_STR("RESERVE_PINS_USB", "PA11,PA12");
void
usb_init(void)
{
- // Pull the D+ pin low briefly to signal a new connection
- gpio_out_setup(GPIO('A', 12), 0);
- udelay(5000);
- gpio_in_setup(GPIO('A', 12), 0);
+ if (CONFIG_MACH_STM32F1) {
+ // Pull the D+ pin low briefly to signal a new connection
+ gpio_out_setup(GPIO('A', 12), 0);
+ udelay(5000);
+ gpio_in_setup(GPIO('A', 12), 0);
+ }
// Enable USB clock
enable_pclock(USB_BASE);
@@ -280,12 +282,21 @@ usb_init(void)
// Setup USB packet memory
btable_configure();
+ // Enable USB pullup
+#ifdef USB_BCDR_DPPU
+ USB->BCDR = USB_BCDR_DPPU;
+#endif
+
// Reset usb controller and enable interrupts
USB->CNTR = USB_CNTR_FRES;
USB->BTABLE = 0;
USB->DADDR = 0;
USB->CNTR = USB_CNTR_RESETM;
USB->ISTR = 0;
- armcm_enable_irq(USB_LP_CAN1_RX0_IRQHandler, USB_LP_CAN1_RX0_IRQn, 1);
+#if CONFIG_MACH_STM32F103
+ armcm_enable_irq(USB_IRQHandler, USB_LP_IRQn, 1);
+#elif CONFIG_MACH_STM32F0
+ armcm_enable_irq(USB_IRQHandler, USB_IRQn, 1);
+#endif
}
DECL_INIT(usb_init);