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author | Timofey Titovets <nefelim4ag@gmail.com> | 2025-01-30 21:24:16 +0100 |
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committer | KevinOConnor <kevin@koconnor.net> | 2025-02-06 12:10:29 -0500 |
commit | fec3e685c92ef263a829a73510c74245d7772c03 (patch) | |
tree | 44cdce952c07b91140e242c336677ca68e62bbed /src/stm32/stm32h7_spi.c | |
parent | b16cb6575d69aa4fd1737e42f19d28aec1fcad89 (diff) | |
download | kutter-fec3e685c92ef263a829a73510c74245d7772c03.tar.gz kutter-fec3e685c92ef263a829a73510c74245d7772c03.tar.xz kutter-fec3e685c92ef263a829a73510c74245d7772c03.zip |
stm32: h7 spi support reload mode & frequency
Signed-off-by: Timofey Titovets <nefelim4ag@gmail.com>
Diffstat (limited to 'src/stm32/stm32h7_spi.c')
-rw-r--r-- | src/stm32/stm32h7_spi.c | 12 |
1 files changed, 10 insertions, 2 deletions
diff --git a/src/stm32/stm32h7_spi.c b/src/stm32/stm32h7_spi.c index ec69f851..35f25e46 100644 --- a/src/stm32/stm32h7_spi.c +++ b/src/stm32/stm32h7_spi.c @@ -100,19 +100,27 @@ spi_setup(uint32_t bus, uint8_t mode, uint32_t rate) while ((pclk >> (div + 1)) > rate && div < 7) div++; - uint32_t cr1 = SPI_CR1_SPE; spi->CFG1 |= (div << SPI_CFG1_MBR_Pos) | (7 << SPI_CFG1_DSIZE_Pos); CLEAR_BIT(spi->CFG1, SPI_CFG1_CRCSIZE); spi->CFG2 |= ((mode << SPI_CFG2_CPHA_Pos) | SPI_CFG2_MASTER | SPI_CFG2_SSM | SPI_CFG2_AFCNTR | SPI_CFG2_SSOE); spi->CR1 |= SPI_CR1_SSI; - return (struct spi_config){ .spi = spi, .spi_cr1 = cr1 }; + return (struct spi_config){ .spi = spi, .div = div, .mode = mode }; } void spi_prepare(struct spi_config config) { + uint32_t div = config.div; + uint32_t mode = config.mode; + SPI_TypeDef *spi = config.spi; + // Reload frequency + spi->CFG1 = (spi->CFG1 & ~SPI_CFG1_MBR_Msk); + spi->CFG1 |= (div << SPI_CFG1_MBR_Pos); + // Reload mode + spi->CFG2 = (spi->CFG2 & ~SPI_CFG2_CPHA_Msk); + spi->CFG2 |= (mode << SPI_CFG2_CPHA_Pos); } void |