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author | adelyser <12093019+adelyser@users.noreply.github.com> | 2021-12-29 16:01:28 -0700 |
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committer | GitHub <noreply@github.com> | 2021-12-29 18:01:28 -0500 |
commit | 9bdd61758e61d4652ae09515425c3316c6cfe905 (patch) | |
tree | 59167c7ef3d97715c1616878c223a35227064f29 /src/stm32/stm32h7.c | |
parent | 98af5dffe61476200d1215afbd00b0d809ad0474 (diff) | |
download | kutter-9bdd61758e61d4652ae09515425c3316c6cfe905.tar.gz kutter-9bdd61758e61d4652ae09515425c3316c6cfe905.tar.xz kutter-9bdd61758e61d4652ae09515425c3316c6cfe905.zip |
stm32: Fix the GPIO register for stm32h7 (#5077)
Signed-off-by: Aaron DeLyser <bluwolf@gmail.com>
Diffstat (limited to 'src/stm32/stm32h7.c')
-rw-r--r-- | src/stm32/stm32h7.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/src/stm32/stm32h7.c b/src/stm32/stm32h7.c index 4edab5f0..0e4094c1 100644 --- a/src/stm32/stm32h7.c +++ b/src/stm32/stm32h7.c @@ -100,9 +100,9 @@ get_pclock_frequency(uint32_t periph_base) void gpio_clock_enable(GPIO_TypeDef *regs) { - uint32_t pos = ((uint32_t)regs - D3_APB1PERIPH_BASE) / 0x400; - RCC->APB4ENR |= (1<<pos); - RCC->APB4ENR; + uint32_t pos = ((uint32_t)regs - D3_AHB1PERIPH_BASE) / 0x400; + RCC->AHB4ENR |= (1<<pos); + RCC->AHB4ENR; } #if !CONFIG_STM32_CLOCK_REF_INTERNAL |