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| author | D4SK <konstantin.vogel@gmx.net> | 2022-10-20 21:59:38 +0200 |
|---|---|---|
| committer | Kevin O'Connor <kevin@koconnor.net> | 2022-10-21 20:29:12 -0400 |
| commit | 00191b5cc4c626c61ff45afa1949e3977547909e (patch) | |
| tree | d7e8a38d77d7836c4e1f1da2299666c2029a0cac /src/stm32/stm32h7.c | |
| parent | 0d9b2cc1fa297b9adedb14be31a8d5c8d7868681 (diff) | |
| download | kutter-00191b5cc4c626c61ff45afa1949e3977547909e.tar.gz kutter-00191b5cc4c626c61ff45afa1949e3977547909e.tar.xz kutter-00191b5cc4c626c61ff45afa1949e3977547909e.zip | |
stm32: Enable instruction and data cache on stm32h7
Signed-off-by: Konstantin Vogel <konstantin.vogel@gmx.net>
Diffstat (limited to 'src/stm32/stm32h7.c')
| -rw-r--r-- | src/stm32/stm32h7.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/src/stm32/stm32h7.c b/src/stm32/stm32h7.c index 056f7be2..d24d07b7 100644 --- a/src/stm32/stm32h7.c +++ b/src/stm32/stm32h7.c @@ -148,6 +148,9 @@ clock_setup(void) ; } + SCB_EnableICache(); + SCB_EnableDCache(); + // Set flash latency according to clock frequency (pg.159) uint32_t flash_acr_latency = (CONFIG_CLOCK_FREQ > 450000000) ? FLASH_ACR_LATENCY_4WS : FLASH_ACR_LATENCY_2WS; |