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| author | Kevin O'Connor <kevin@koconnor.net> | 2021-08-01 13:23:45 -0400 |
|---|---|---|
| committer | Kevin O'Connor <kevin@koconnor.net> | 2021-08-01 13:46:31 -0400 |
| commit | 0971a8c2e1415a94d6e386e24b37fd13ecd6228f (patch) | |
| tree | 4d3d140cf9671d03dd9b74169970abab8a039950 /src/stm32/stm32f0_serial.c | |
| parent | 69d9497df325b0ea7ef71824f7106ae09fcbcdbb (diff) | |
| download | kutter-0971a8c2e1415a94d6e386e24b37fd13ecd6228f.tar.gz kutter-0971a8c2e1415a94d6e386e24b37fd13ecd6228f.tar.xz kutter-0971a8c2e1415a94d6e386e24b37fd13ecd6228f.zip | |
stm32: Support PB7/PB6 for USART1 on stm32f0
Add support for USART1 on PB7/PB6.
Remove STM32_SERIAL_USART1_ALT_PA15_PA14 option and allow all serial
mappings to be used on stm32f031.
Reported by @Desuuuu.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
Diffstat (limited to 'src/stm32/stm32f0_serial.c')
| -rw-r--r-- | src/stm32/stm32f0_serial.c | 22 |
1 files changed, 16 insertions, 6 deletions
diff --git a/src/stm32/stm32f0_serial.c b/src/stm32/stm32f0_serial.c index 3fb7974a..367c2991 100644 --- a/src/stm32/stm32f0_serial.c +++ b/src/stm32/stm32f0_serial.c @@ -16,28 +16,38 @@ DECL_CONSTANT_STR("RESERVE_PINS_serial", "PA10,PA9"); #define GPIO_Rx GPIO('A', 10) #define GPIO_Tx GPIO('A', 9) + #define USARTx_FUNCTION GPIO_FUNCTION(1) #define USARTx USART1 #define USARTx_IRQn USART1_IRQn -#elif CONFIG_STM32_SERIAL_USART1_ALT_PA15_PA14 - DECL_CONSTANT_STR("RESERVE_PINS_serial", "PA15,PA14"); - #define GPIO_Rx GPIO('A', 15) - #define GPIO_Tx GPIO('A', 14) +#elif CONFIG_STM32_SERIAL_USART1_ALT_PB7_PB6 + DECL_CONSTANT_STR("RESERVE_PINS_serial", "PB7,PB6"); + #define GPIO_Rx GPIO('B', 7) + #define GPIO_Tx GPIO('B', 6) + #define USARTx_FUNCTION GPIO_FUNCTION(0) #define USARTx USART1 #define USARTx_IRQn USART1_IRQn #elif CONFIG_STM32_SERIAL_USART2 DECL_CONSTANT_STR("RESERVE_PINS_serial", "PA3,PA2"); #define GPIO_Rx GPIO('A', 3) #define GPIO_Tx GPIO('A', 2) + #define USARTx_FUNCTION GPIO_FUNCTION(1) #define USARTx USART2 #define USARTx_IRQn USART2_IRQn #elif CONFIG_STM32_SERIAL_USART2_ALT_PA15_PA14 DECL_CONSTANT_STR("RESERVE_PINS_serial", "PA15,PA14"); #define GPIO_Rx GPIO('A', 15) #define GPIO_Tx GPIO('A', 14) + #define USARTx_FUNCTION GPIO_FUNCTION(1) #define USARTx USART2 #define USARTx_IRQn USART2_IRQn #endif +#if CONFIG_MACH_STM32F031 +// The stm32f031 has same pins for USART2, but everything is routed to USART1 +#define USART2 USART1 +#define USART2_IRQn USART1_IRQn +#endif + #define CR1_FLAGS (USART_CR1_UE | USART_CR1_RE | USART_CR1_TE \ | USART_CR1_RXNEIE) @@ -75,7 +85,7 @@ serial_init(void) USARTx->CR1 = CR1_FLAGS; armcm_enable_irq(USARTx_IRQHandler, USARTx_IRQn, 0); - gpio_peripheral(GPIO_Rx, GPIO_FUNCTION(1), 1); - gpio_peripheral(GPIO_Tx, GPIO_FUNCTION(1), 0); + gpio_peripheral(GPIO_Rx, USARTx_FUNCTION, 1); + gpio_peripheral(GPIO_Tx, USARTx_FUNCTION, 0); } DECL_INIT(serial_init); |