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| author | Kevin O'Connor <kevin@koconnor.net> | 2019-11-13 22:20:29 -0500 |
|---|---|---|
| committer | Kevin O'Connor <kevin@koconnor.net> | 2019-11-14 15:54:28 -0500 |
| commit | 9ff4f1bb2f7be2b98ed92cd40cda1c47af3448d1 (patch) | |
| tree | 23e47ec811b2852cceb8b6e7ffe53c778b2c4e69 /src/stm32/stm32f0.c | |
| parent | d39142139e3d7b914f230e78d18e051564e0fd3d (diff) | |
| download | kutter-9ff4f1bb2f7be2b98ed92cd40cda1c47af3448d1.tar.gz kutter-9ff4f1bb2f7be2b98ed92cd40cda1c47af3448d1.tar.xz kutter-9ff4f1bb2f7be2b98ed92cd40cda1c47af3448d1.zip | |
stm32f0: Initial support for i2c on stm32f0
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
Diffstat (limited to 'src/stm32/stm32f0.c')
| -rw-r--r-- | src/stm32/stm32f0.c | 10 |
1 files changed, 8 insertions, 2 deletions
diff --git a/src/stm32/stm32f0.c b/src/stm32/stm32f0.c index f9eabeab..11951920 100644 --- a/src/stm32/stm32f0.c +++ b/src/stm32/stm32f0.c @@ -128,9 +128,12 @@ pll_setup(void) while ((RCC->CFGR & RCC_CFGR_SWS_Msk) != RCC_CFGR_SWS_PLL) ; - // Select PLL as source for USB clock + // Setup CFGR3 register + uint32_t cfgr3 = RCC_CFGR3_I2C1SW; if (CONFIG_USBSERIAL) - RCC->CFGR3 = RCC_CFGR3_USBSW; + // Select PLL as source for USB clock + cfgr3 |= RCC_CFGR3_USBSW; + RCC->CFGR3 = cfgr3; } // Configure and enable internal 48Mhz clock on the stm32f042 @@ -153,6 +156,9 @@ hsi48_setup(void) enable_pclock(CRS_BASE); CRS->CR |= CRS_CR_AUTOTRIMEN | CRS_CR_CEN; } + + // Setup I2C1 clock + RCC->CFGR3 = RCC_CFGR3_I2C1SW; #endif } |