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authorjrhelbert <jrhelbert@gmail.com>2021-10-11 15:31:27 -0500
committerGitHub <noreply@github.com>2021-10-11 16:31:27 -0400
commitdbafeb8876d5091a273d7ad59307d687ed379227 (patch)
tree70fde7e012eadee7b74a0c049886113d85084e43 /src/stm32/hard_pwm.c
parent5d52a3b19fecaaacc50221e137a56458cf0f9c4e (diff)
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stm32: Adding Hardware PWM support for the STM32F4 processors (#4693)
This change has been expanded to include all STM32F4 processors, since they share a common TIMER mapping with some processors just not having all of the timers and pins. Signed-off-by: Jerome Helbert <jerome@helbert.net>
Diffstat (limited to 'src/stm32/hard_pwm.c')
-rw-r--r--src/stm32/hard_pwm.c63
1 files changed, 62 insertions, 1 deletions
diff --git a/src/stm32/hard_pwm.c b/src/stm32/hard_pwm.c
index d61ba5ce..bc52e3ac 100644
--- a/src/stm32/hard_pwm.c
+++ b/src/stm32/hard_pwm.c
@@ -62,7 +62,8 @@ static const struct gpio_pwm_info pwm_regs[] = {
{TIM16, GPIO('B', 8), 1, GPIO_FUNCTION(1)},
{TIM17, GPIO('F', 7), 1, GPIO_FUNCTION(1)},
{TIM17, GPIO('B', 9), 1, GPIO_FUNCTION(1)}
-#else
+#endif
+#if CONFIG_MACH_STM32F103
{TIM2, GPIO('A', 0), 1, GPIO_FUNCTION(2)},
{TIM2, GPIO('A', 1), 2, GPIO_FUNCTION(2)},
{TIM2, GPIO('A', 2), 3, GPIO_FUNCTION(2)},
@@ -88,6 +89,66 @@ static const struct gpio_pwm_info pwm_regs[] = {
{TIM4, GPIO('B', 8), 3, GPIO_FUNCTION(2)},
{TIM4, GPIO('B', 9), 4, GPIO_FUNCTION(2)}
#endif
+#if CONFIG_MACH_STM32F401
+ {TIM3, GPIO('A', 6), 1, GPIO_FUNCTION(2)},
+ {TIM3, GPIO('C', 6), 1, GPIO_FUNCTION(3)},
+ {TIM3, GPIO('A', 7), 2, GPIO_FUNCTION(2)},
+ {TIM3, GPIO('C', 7), 2, GPIO_FUNCTION(3)},
+ {TIM3, GPIO('C', 8), 3, GPIO_FUNCTION(3)},
+ {TIM3, GPIO('C', 9), 4, GPIO_FUNCTION(3)},
+#endif
+#if CONFIG_MACH_STM32F446
+ {TIM2, GPIO('B', 2), 4, GPIO_FUNCTION(1)},
+#endif
+#if CONFIG_MACH_STM32F405 || \
+ CONFIG_MACH_STM32F407 || \
+ CONFIG_MACH_STM32F429 || \
+ CONFIG_MACH_STM32F446
+ {TIM8, GPIO('C', 6), 1, GPIO_FUNCTION(3)},
+ {TIM8, GPIO('C', 7), 2, GPIO_FUNCTION(3)},
+ {TIM8, GPIO('C', 8), 3, GPIO_FUNCTION(3)},
+ {TIM8, GPIO('C', 9), 4, GPIO_FUNCTION(3)},
+ {TIM11, GPIO('F', 7), 1, GPIO_FUNCTION(3)},
+ {TIM12, GPIO('B', 14), 1, GPIO_FUNCTION(9)},
+ {TIM12, GPIO('B', 15), 2, GPIO_FUNCTION(9)},
+ {TIM13, GPIO('A', 6), 1, GPIO_FUNCTION(9)},
+ {TIM13, GPIO('F', 8), 1, GPIO_FUNCTION(9)},
+ {TIM14, GPIO('A', 7), 1, GPIO_FUNCTION(9)},
+ {TIM14, GPIO('F', 9), 1, GPIO_FUNCTION(9)},
+#endif
+#if CONFIG_MACH_STM32F4 // Pins that map to all klipper defined STM32F4 procs
+ {TIM1, GPIO('A', 8), 1, GPIO_FUNCTION(1)},
+ {TIM1, GPIO('E', 9), 1, GPIO_FUNCTION(1)},
+ {TIM1, GPIO('A', 9), 2, GPIO_FUNCTION(1)},
+ {TIM1, GPIO('E', 11), 2, GPIO_FUNCTION(1)},
+ {TIM1, GPIO('A', 10), 3, GPIO_FUNCTION(1)},
+ {TIM1, GPIO('E', 13), 3, GPIO_FUNCTION(1)},
+ {TIM1, GPIO('A', 11), 4, GPIO_FUNCTION(1)},
+ {TIM1, GPIO('E', 14), 4, GPIO_FUNCTION(1)},
+ {TIM2, GPIO('A', 5), 1, GPIO_FUNCTION(1)},
+ {TIM2, GPIO('A', 15), 1, GPIO_FUNCTION(1)},
+ {TIM2, GPIO('B', 3), 2, GPIO_FUNCTION(1)},
+ {TIM2, GPIO('B', 10), 3, GPIO_FUNCTION(1)},
+ {TIM2, GPIO('B', 11), 4, GPIO_FUNCTION(1)},
+ {TIM3, GPIO('B', 4), 1, GPIO_FUNCTION(2)},
+ {TIM3, GPIO('B', 5), 2, GPIO_FUNCTION(2)},
+ {TIM3, GPIO('B', 0), 3, GPIO_FUNCTION(2)},
+ {TIM3, GPIO('B', 1), 4, GPIO_FUNCTION(2)},
+ {TIM4, GPIO('B', 6), 1, GPIO_FUNCTION(2)},
+ {TIM4, GPIO('D', 12), 1, GPIO_FUNCTION(2)},
+ {TIM4, GPIO('B', 7), 2, GPIO_FUNCTION(2)},
+ {TIM4, GPIO('D', 13), 2, GPIO_FUNCTION(2)},
+ {TIM4, GPIO('D', 14), 3, GPIO_FUNCTION(2)},
+ {TIM4, GPIO('D', 15), 4, GPIO_FUNCTION(2)},
+ {TIM5, GPIO('A', 0), 1, GPIO_FUNCTION(2)},
+ {TIM5, GPIO('A', 1), 2, GPIO_FUNCTION(2)},
+ {TIM5, GPIO('A', 2), 3, GPIO_FUNCTION(2)},
+ {TIM5, GPIO('A', 3), 4, GPIO_FUNCTION(2)},
+ {TIM9, GPIO('E', 5), 1, GPIO_FUNCTION(3)},
+ {TIM9, GPIO('E', 6), 2, GPIO_FUNCTION(3)},
+ {TIM10, GPIO('B', 8), 1, GPIO_FUNCTION(3)},
+ {TIM11, GPIO('B', 9), 1, GPIO_FUNCTION(3)}
+#endif
};
struct gpio_pwm