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| author | Stefan Dej <meteyou@gmail.com> | 2023-05-17 21:42:50 +0200 |
|---|---|---|
| committer | KevinOConnor <kevin@koconnor.net> | 2023-05-20 11:31:28 -0400 |
| commit | 37315bf3365484c3ba6adef2b7da2b4464980e8a (patch) | |
| tree | d699c64eab36ec125ef4f8ca75bb2f786c2bc038 /src/stm32/fdcan.c | |
| parent | 7511151ac95acb9f55efffa2ad5780bf2683d977 (diff) | |
| download | kutter-37315bf3365484c3ba6adef2b7da2b4464980e8a.tar.gz kutter-37315bf3365484c3ba6adef2b7da2b4464980e8a.tar.xz kutter-37315bf3365484c3ba6adef2b7da2b4464980e8a.zip | |
stm32: add PB5/PB6 as CAN pins - required for BTT U2C v2.x
Signed-off-by: Stefan Dej <meteyou@gmail.com>
Diffstat (limited to 'src/stm32/fdcan.c')
| -rw-r--r-- | src/stm32/fdcan.c | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/src/stm32/fdcan.c b/src/stm32/fdcan.c index 9198c7dc..a1624f8c 100644 --- a/src/stm32/fdcan.c +++ b/src/stm32/fdcan.c @@ -46,6 +46,10 @@ DECL_CONSTANT_STR("RESERVE_PINS_CAN", "PC2,PC3"); #define GPIO_Rx GPIO('C', 2) #define GPIO_Tx GPIO('C', 3) +#elif CONFIG_STM32_CANBUS_PB5_PB6 + DECL_CONSTANT_STR("RESERVE_PINS_CAN", "PB5,PB6"); + #define GPIO_Rx GPIO('B', 5) + #define GPIO_Tx GPIO('B', 6) #elif CONFIG_STM32_CANBUS_PB12_PB13 DECL_CONSTANT_STR("RESERVE_PINS_CAN", "PB12,PB13"); #define GPIO_Rx GPIO('B', 12) @@ -53,7 +57,7 @@ #endif #if !(CONFIG_STM32_CANBUS_PB0_PB1 || CONFIG_STM32_CANBUS_PC2_PC3 \ - || CONFIG_STM32_CANBUS_PB12_PB13) + || CONFIG_STM32_CANBUS_PB5_PB6 ||CONFIG_STM32_CANBUS_PB12_PB13) #define SOC_CAN FDCAN1 #define MSG_RAM (((struct fdcan_ram_layout*)SRAMCAN_BASE)->fdcan1) #else |