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| author | Arek <arek@raj.priv.pl> | 2021-02-19 02:12:32 +0100 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2021-02-18 20:12:32 -0500 |
| commit | e6d1910ef97fdc6e49bdd5cd82e0bd310d3b246b (patch) | |
| tree | 0d79f4ff0e261a872bf5d41ab321caff269b448a /src/stm32/can.c | |
| parent | 03b3cff823ce66fe70ced88bf6e3c78cccafd7f8 (diff) | |
| download | kutter-e6d1910ef97fdc6e49bdd5cd82e0bd310d3b246b.tar.gz kutter-e6d1910ef97fdc6e49bdd5cd82e0bd310d3b246b.tar.xz kutter-e6d1910ef97fdc6e49bdd5cd82e0bd310d3b246b.zip | |
stm32: Add STM32F429 variant (#3926)
* Add F429 variant; add CAN on PD0,PD1; add 25Mhx clock; move CAN1_RX from PI8 to correct position (PI9)
* Add test for STM32F429
Signed-off-by: Arkadiusz Raj <arek.raj@gmail.com>
Diffstat (limited to 'src/stm32/can.c')
| -rw-r--r-- | src/stm32/can.c | 11 |
1 files changed, 8 insertions, 3 deletions
diff --git a/src/stm32/can.c b/src/stm32/can.c index 143766c7..c4d45f9c 100644 --- a/src/stm32/can.c +++ b/src/stm32/can.c @@ -28,8 +28,8 @@ #define GPIO_Tx GPIO('B', 9) #endif #if CONFIG_CAN_PINS_PI8_PH13 - DECL_CONSTANT_STR("RESERVE_PINS_CAN", "PI8,PH13"); - #define GPIO_Rx GPIO('I', 8) + DECL_CONSTANT_STR("RESERVE_PINS_CAN", "PI9,PH13"); + #define GPIO_Rx GPIO('I', 9) #define GPIO_Tx GPIO('H', 13) #endif #if CONFIG_CAN_PINS_PB5_PB6 @@ -42,6 +42,11 @@ #define GPIO_Rx GPIO('B', 12) #define GPIO_Tx GPIO('B', 13) #endif +#if CONFIG_CAN_PINS_PD0_PD1 + DECL_CONSTANT_STR("RESERVE_PINS_CAN", "PD0,PD1"); + #define GPIO_Rx GPIO('D', 0) + #define GPIO_Tx GPIO('D', 1) +#endif #if CONFIG_MACH_STM32F0 #define SOC_CAN CAN @@ -64,7 +69,7 @@ #if CONFIG_MACH_STM32F4 #warning CAN on STM32F4 is untested #if (CONFIG_CAN_PINS_PA11_PA12 || CONFIG_CAN_PINS_PB8_PB9 \ - || CONFIG_CAN_PINS_PI8_PH13) + || CONFIG_CAN_PINS_PD0_PD1 || CONFIG_CAN_PINS_PI9_PH13) #define SOC_CAN CAN1 #define CAN_RX0_IRQn CAN1_RX0_IRQn #define CAN_RX1_IRQn CAN1_RX1_IRQn |